**** BEGIN LOGGING AT Tue May 17 02:59:58 2016 May 17 04:12:57 morning May 17 13:38:56 Hey foreverska. May 17 13:39:13 Hey bud, how's it going? May 17 13:39:35 Been pretty busy with my exams lately :( Had one today. May 17 13:40:24 Well here's hoping you ace them. May 17 13:40:37 Anyway foreverska I have been struggling with TI CCS. I haven't been able to get the code uploaded to the PRU's May 17 13:40:52 Haha, trying my best : ) May 17 13:41:43 Are you talking through a JTAG interface or via code? May 17 13:42:16 foreverska, I think I need to use serial debug to stop the ARM from booting and then upload. May 17 13:43:14 I've never had to do all that. How are you trying to flash the PRUs? May 17 13:43:34 No I am not using a JTAG interface. May 17 13:44:30 Wait,http://processors.wiki.ti.com/index.php/PRU_Training:_Hands-on_Labs . <= foreverska ,I am following this. May 17 13:45:39 foreverska, The first experiment is to upload code to the PRU's using TI CCS. Are these the steps you usually follow? May 17 13:46:29 I did PRU development before this or even C PRU development was a thing. May 17 13:47:33 Do you have this PRU cape? May 17 13:51:41 foreverska, No I don't.The first one doesn't require it.I am just trying to test my code by using an led connected at the appropriate GPIO pins. May 17 13:52:43 foreverska, At the moment I donot have access to a TTL converter. Would have to go to the lab for that. May 17 13:53:37 I have a gap of three days after my exam on the 19 so I will try to do this then. May 17 13:55:18 Ah, Lab 1 talked about the PRU_CAPE.gel file so I thought it was. A lot of capes have a chip identifying them to turn on the appropriate device trees so I thought maybe that is what they were doing since I didn't notice instructions about turning on the pruss. May 17 13:57:35 foreverska, So I guess the only thing I haven't tried is to actually use a serial monitor and interrupt the boot sequence. May 17 13:59:22 I'm not sure what you'd see there. PRUSS runs independently of the OS. It can be shut down and brought up at will once the PRUSS is running May 17 14:01:26 foreverska, Hmmn,I guess I need to read up a bit on the PRUSS. May 17 14:03:26 Well there is one main hurdle IIRC, the device tree. It controls a few things, chiefly which pins the prus can access but I think there is also a setting to turn the system on. This may be solved by the PRU cap, I don't know fully, I've always done it the abusrdly difficult way. May 17 14:04:15 foreverska, Which is? ; ) May 17 14:05:11 The absurdly difficult way? To manually edit the device tree. May 17 14:05:32 Okay,that must be tough. May 17 14:05:36 Then when I was doing it, the chief way to load anything to a PRU was a little bit of C code and there used to be a GCC like program floating around around to debug them. May 17 14:06:13 The C code to load PRUs is at the end of this file: May 17 14:06:14 https://github.com/foreverska/riotstandalone/blob/master/PrussV2_interface/prussv2_interface.c May 17 14:06:40 Ohh. Things have changed a lot.But a lot of people are using TI CCS. I can't believe it is so difficult to load code via it. May 17 14:07:02 Okay Will take a look through it. May 17 14:08:57 Ahh yea... I don't think TI CCS had support when I was doing it. I've noticed that their support has gotten a lot better. I have an Industrial Communications Engine based on the AM335X on my desk and I've seen JTAG support for the PRUs through that. May 17 14:11:03 I used to have the most jacked up development cycle. I used SSHFS to keep the development code on the BBB but then open it in Geany on my desktop. Then an SSH terminal open so I could compile it with GCC and whatever PRU assembly compiler I was using at the time. May 17 14:16:08 foreverska, Okay. That must have been pretty exhausting : ) May 17 14:16:46 foreverska, Riotstandalone was your GSOC project? May 17 14:17:21 Yea, not as succesful as I'd hoped but it did pass logic analyzer tests on a good day. May 17 14:18:23 Engine managment solution with detereminism achieved in the PRUs and the high level logic lived in userland. May 17 14:20:36 foreverska, Ohh.Engine as in car engines? May 17 14:21:18 Names of your folders are ignition and all so I thought : ) May 17 14:22:06 foreverska, Looks pretty neat ! May 17 14:22:13 Yea. I wouldn't put it on a car engine in it's current state. Probably a lawnmower engine, smaller explosion. lol May 17 14:23:52 foreverska, It's a great idea ! Although you haven't put much in the readme section :P May 17 14:24:46 lol yea, just enough to satisfy the organization I was with. May 17 14:25:32 Haha : ) : ) . May 17 14:26:48 foreverska, Okay got to study! I will let you know about the status of my struggle with TI CCS as soon as I can! May 17 14:27:47 Sounds good. I have CCS on my work laptop and about a half dozen BBB littering my desk so I may try to find some time to walk through the examples myself. May 17 14:28:44 foreverska, That would very nice.Perhaps you could find a way out of this. May 17 14:29:00 Thanks for your help! Bye May 17 14:29:05 cya May 17 17:46:57 Hey Wormo ! May 17 17:51:19 Hey ds2! I have a question out of curiosity ... We discussed about how beaglescope will be better than using GPMC, to be frank, I didnt know about GPMC and never used it, so its simple, I dont understand. But, I would really like to know how to compare the two ? May 17 17:52:09 well... the PRU is flipping 16 gpios May 17 17:52:21 the GPMC is the product of the memory bus of teh main SoC May 17 17:52:52 so... for GPMC, you could setup the DMA engine to read a magic memory location which maps to the GPMC May 17 17:53:10 for the PRU, you need to toggle the pins the right way to get data and then pull in the data May 17 17:55:44 okay so is it like, the ADC needs some particular pins to be toggled, only then, it will output the data, and if that is the case, we cannot theoretical use the GPMC for this purpose ? May 17 17:56:29 ds2: ^^ May 17 17:56:33 well... 2 things May 17 17:56:54 1. Most ADCs are setup so that the toggling will look like a memory device (just a common "convention"). May 17 17:57:22 2. Even if it was way off (beyond the flexibility of the GPPMC block), it usually only require some glue logic May 17 17:57:46 (glue logic can be anything from 74xxx logic to a CPLD, PLD, PLA, or FPGA) May 17 17:58:46 worse stuff I came across is the bus is not Hi-Z'ed between xfers... so you either need something like a 74HC244 (IRC) in front of it or make sure nothing else uses that bus May 17 17:59:16 remember, the simpliest memory device is pretty much N bits of data in parallel May 17 17:59:40 most will add some kind of /RD, /CS controls to determine if it is HiZ or not May 17 18:00:30 one of the modes of the GPMC is a bus that looks a lot like an 8088/8086 bus May 17 18:00:46 the GPMC can be setup to do there more complex modes May 17 18:01:46 okay ... May 17 18:03:08 the 8088/8086 buses are used in a lot of things... the 8051 external bus is like the 8088 May 17 18:03:56 think you mentioned you had classes on processor buses, right? May 17 18:21:43 hi ZeekHuge May 17 18:23:26 http://processors.wiki.ti.com/index.php/AM3715/03_GPMC_Subsystem May 17 18:23:45 TI puts GPMC on lots of their SoC chips May 17 18:24:29 on products I work on, it is used to talk to NOR, NAND, and FPGA chips May 17 18:27:11 GPMC gets set up to control certain pins as address pins, others as data pins, others as independent signals (to select read/write, clock data in and out once the other pins are stable, etc0 **** ENDING LOGGING AT Wed May 18 02:59:58 2016