**** BEGIN LOGGING AT Sun Apr 12 03:00:14 2020 Apr 12 10:23:24 ds2: There seems to be a problem. If I use NNPACK or other common acceleration library, they can only help our objective by using the on-board GPUs, which is not much on the AI or x15. Alternatively using the DSP requires writing OpenCL... _Its not clear how EVEs can be configured similarly_... Apr 12 10:23:27 Do you suggest any way around that ? Apr 12 19:00:07 Hello i am trying to interface a Univerasal shift register with the PRU in order to write a code i am trying to understand the truth table Apr 12 19:00:52 I am having some problems understanding it, and have some questions can canyone help me with it? Apr 12 19:01:24 Here is the datasheet Apr 12 19:01:26 https://www.ti.com/lit/ds/symlink/cd74hc299.pdf Apr 12 19:32:32 I am versed with this, I learnt this last sem. What are your doubts? Apr 12 20:40:15 I found my solution to my immediate problem in the other GSoC group. However i am trying to make a timing diagram of the process to turn the chip in SIPO and PISO modes. May be you can also try making one and we can discuss Apr 12 20:41:04 It would help me program the PRUs accordingly Apr 12 21:01:45 i mean the other #beagle group Apr 13 02:57:07 To put in SIPO mode, you put serial data on Serial data in **** ENDING LOGGING AT Mon Apr 13 02:59:57 2020