**** BEGIN LOGGING AT Sat Mar 19 02:59:58 2016 Mar 19 06:30:51 Hey ! Do you think that data could be transfered from the PRU-ICSS to the DRAM at the rate of atleast 3MBps over the L4 interconnect ? Mar 19 06:31:20 ie the OCP slave port that is internally connected to the L4 interconnect bus ? Mar 19 08:41:50 ZeekHuge: zmatt might know ... Mar 19 15:50:46 I might, but ZeekHuge left Mar 19 15:51:11 though conclusive results would require testing Mar 19 15:51:34 3MB/s sounds pretty wimpy though Mar 19 15:56:06 you'd meet that target if every transfer takes at most 254 cycles of the L4HS... safe to say, that's really not a problem unless the accesses are getting heavily stalled Mar 19 15:58:05 however, assuming PRU access to the RAMs is prioritized over external access, this could still happen but it would depend on how heavily the RAM is being access by the PRU cores Mar 19 16:03:00 (offloading data via the master ports of the PRU cores may be more efficient, since they're direct L3 initiators, but it may cost more of the PRU's valueable time) Mar 19 16:29:16 another point worth considering is that the L4HS serializes all requests, so if some request is stalling it's also blocking access to the other subsystem on the L4HS: the ethernet subsystem. packet data is handled via its L3 initiator port, but access to e.g. the irq register and the linked list of DMA descriptors still goes via the L4HS Mar 19 17:57:03 Buenas tardes. Mar 19 17:59:15 Hola, alguién por aquí? Mar 19 18:38:55 anyone there Mar 19 18:55:53 yes Mar 20 01:37:24 Hello. Mar 20 01:38:33 I am testing out a BBB with 4.1.15-ti-rt-r43 , I want to use a USB soundcard and disable HDMI audio. I can't seem to locate the alsa-base.conf file that is usually located in /etc/modprobe.d Where is this file? Mar 20 02:56:20 hello Mar 20 02:56:55 ok Mar 20 02:57:23 i want to buy one beagle board Mar 20 02:57:51 can any one please help me which one is good **** ENDING LOGGING AT Sun Mar 20 02:59:58 2016