**** BEGIN LOGGING AT Thu May 12 02:59:58 2016 May 12 03:05:13 ok, I got a serious-sounding error in the log, yet my overlay in fact did seem to work May 12 03:05:53 lol, attempting to remove the overlay was a bad idea though May 12 03:06:40 NULL dereference in kernelspace, woo May 12 03:07:32 i heard that adding and removing overlays could ultimately cause issues May 12 03:11:53 no longer reboots either May 12 03:12:16 didn't I have a watchdog to kick in in such situations? :/ May 12 03:14:21 never mind it isn't working May 12 03:14:32 probably pinmux failed again May 12 03:14:50 yeap May 12 03:20:35 are there any OMAP SoCs that have the PRU-ICSS on-chip? May 12 03:22:01 zmatt what's the reset number associated with the offset address? May 12 03:29:29 this system is to new york city what atmega is to gatlinburg tennessee May 12 03:29:35 and i love new york city May 12 03:30:47 ayjay: "what's the reset number associated with the offset address?" ... I have no idea what that's asking May 12 03:31:36 kremlin: omap-L1xx have PRUSSv1 (not PRUSSv2 aka PRU-ICSS) ... those aren't really omaps anyway other than in name May 12 03:32:07 i'm reading the datasheet for registry descriptions and when it describes the registers theres always, eg the first register, (offset = 0h) [reset = 47300001h] May 12 03:32:18 ayjay: that's listing the reset default value May 12 03:32:32 (not unusually wrong) May 12 03:32:33 cool, i'm assuming it will only work for am335x devices May 12 03:32:40 well, only because we only support OMAP and am335x May 12 03:32:41 kremlin: no it's on plenty of SoCs May 12 03:32:45 so any others is not relevant May 12 03:32:54 gotcha May 12 03:33:18 kremlin: it's also on am437x May 12 03:33:32 we don't support those yet May 12 03:33:33 kremlin: but more importantly it's on vayu (dra7xx / am57xx) May 12 03:33:40 neither those May 12 03:33:42 the processor on the x15 May 12 03:34:02 in what sense are you supporting omaps? May 12 03:34:11 considering TI mostly stopped doing so :P May 12 03:34:46 i'm working on a PRU driver for openbsd, which supports some armv7 chips, most relevantly OMAP3, OMAP4, and am335x May 12 03:35:02 i just wanted to make sure there were not OMAP3/4 chips I needed to try and get my driver to attach to May 12 03:38:52 nah May 12 03:38:59 but pruss is very self-contained anyway May 12 03:39:22 there wouldn't be major differences in supporting it on other SoCs May 12 04:29:46 ayjay: overlay example for pwmss pushed May 12 04:29:59 you're still up? May 12 04:30:27 with that my qep example works on a stock kernel May 12 04:30:28 i'm checking it out now May 12 04:30:43 of course it's hard to try out without external hardware May 12 04:30:59 you could reconfigure it for pulse-counting instead of quadrature decoding May 12 04:31:19 i mean you could tie to a variable pwm May 12 04:39:18 uio only supports one interrupt per device eh? May 12 04:49:17 so your pushes didn't break my test May 12 04:53:46 do you an overall structure to how you organize your structures? I was gonna divide mine by individual registers- analog to the datasheet May 12 04:53:54 yours look more divided by concept May 12 04:59:51 ayjay: there's not much choice, they're ordered in the same order they are in memory May 12 05:00:22 you have some freedom in whether you use substructures or bitfields or such May 12 05:00:34 yeah i mean, should i map the whole 4mb into one structure? May 12 05:00:39 (exaggeration) May 12 05:01:33 i'm urged to build methods into the classes to make these things more userfriendly May 12 05:02:04 so am I, but I'm trying not to rush into that since it's far from clear what the way to go is May 12 05:02:42 alrigt May 12 05:02:45 I consider ctypes.Structure to be a temporary solution... it's not good, but I haven't got anything better at hand right now May 12 05:03:06 as you may have noticed I did wrap "magic" registers into methods May 12 05:03:15 i.e. those that do not behave at all "memory-like" May 12 05:03:35 where? May 12 05:03:52 qep May 12 05:03:56 irq_clear and irq_set May 12 05:04:56 so i should create a new strcuture whenever theres a huge gap between offsets? i mean it's a four byte register @ 00, and then another 32bit @ 10 May 12 05:05:35 i'm just double checking becuase i'm about to grind out a 100+ lines of code organizing these ADC registers in structures May 12 05:07:59 I still need to check if there's a clean way to "skip ahead" in a structure May 12 05:08:15 there are only two such alignment skips, and they are very standard May 12 05:08:23 nearly all peripherals have 'em May 12 05:08:43 you can also easily add three filled registers, like ("_04", uint * 3) May 12 05:08:46 *filler May 12 05:10:11 i'm concerned that there really isn't any gain and that we're just hogging ram May 12 05:10:18 by doing the fillers May 12 05:10:22 lol, no May 12 05:10:29 making separate structures would hog ram May 12 05:10:51 memory isn't mapped per byte, it's mapped per 4 KB May 12 05:11:19 O_o May 12 05:11:42 creating separate structures for subranges just means you add python wrapper objects May 12 05:11:58 but they ultimately read from and write to the same 4 KB page May 12 05:12:04 well i figured that python would maybe add a couple bytes per struct May 12 05:12:33 creating another a struct will definitely be more expensive than adding a padding field May 12 05:13:07 and seriously, if you want to save every last single byte, python is the wrong language May 12 05:13:12 hahaha May 12 05:13:14 okay yeah no kidding May 12 05:13:19 keep it simple May 12 05:13:46 as for the registers... keep stuff dumb at first May 12 05:14:12 uints and magic constants you need to check the TRM for to understand are not perfect, but it gets you started quickly May 12 05:14:34 otherwise you may easily end up in analysis-paralysis on how to model things May 12 05:14:53 i'll add fillers i can combine the structs May 12 05:15:06 the 4kb tho comes from mmap? May 12 05:15:18 (assuming uio relies on mmap on some level) May 12 05:15:33 for the adc I see no reason for multiple structs... there are only 7 words of padding in total I think? May 12 05:17:39 I would suggest making a struct for the Step definition, even though it's only two words, since it has lots of bitfields so you'll probably want to make a nice constructor for it sooner or later May 12 05:18:00 and you can define the array of steps like ("step", Step * 16) May 12 05:18:54 4 KB is the minimum translation granule of the MMU yes May 12 05:20:54 (virtual) memory is first divided into 4096 sections of 1 MB, and each of these can be directly mapped to 1 MB of physical memory or it can split into 256 pages of 4 KB May 12 05:21:53 (on ARMv7 before LPAE) May 12 05:22:43 in baremetal code I so far only use section-mapping, linux generally works on page granularity May 12 05:24:27 did you see my private message btw? May 12 05:34:56 i didn't look at the code tho May 12 05:36:31 alright so for the ADC 1 struct it is May 12 05:54:40 well one main struct, possible some sub-structs :) May 12 05:55:46 *possibly May 12 05:56:20 I think inheritance is possible btw with ctypes.Structure though you'd have to try or check docs May 12 05:57:00 yeah it is i just read it May 12 05:57:07 you're thinking of the steps probably May 12 05:57:19 yeah, idle step is just the first word of the two-word structure May 12 06:00:39 btw it's useful to know that nearly all peripherals appear to have no problem with byte and halfword access (typically with notable exception of "write 1 to clear" registers, but that's not really a prob)... May 12 06:01:15 so although the TRM tends to obsessively group stuff into 32-bit registers, there's no need to follow their lead May 12 06:01:32 this doesn't seem much of an issue with the adc May 12 06:03:10 but in some cases I've seen it end up lumping together completely separate things May 12 06:03:28 with a resultant register name of the form "THING_AND_OTHERTHING" or such :P May 12 06:05:26 woh i'd expect a bus error May 12 06:23:08 only on the l3-sn ;) May 12 06:23:40 hey May 12 06:23:54 are a ton of 1 bit wide bitfields acceptable? May 12 06:24:13 it turns out that bitfields in ctypes perform accesses of the declared size May 12 06:24:18 that's why I was able to use them in l3-sn May 12 06:24:32 unfortunately that does mean they are horribly inefficient May 12 06:25:38 nice that means i don't have to name every bit! May 12 06:25:46 yet May 12 06:28:27 I still need to figure out a good solution May 12 06:28:38 that allows individual access, but also allows updating batches May 12 06:28:58 especially since in some cases it's not just about efficiency but requirement May 12 06:29:31 these uio libraries can be a lower layer on top of more intelligent function calls? May 12 06:29:44 or beneath more intelligent functions, i mean May 12 06:29:58 plenty of possibilities May 12 06:30:34 ctypes generates those structure classes and its field descriptors on the fly, that means so can we May 12 06:30:58 I might also eventually write a small C extension to help out a bit... also to trap bus errors and turn them into normal python exceptions May 12 06:31:25 okay well from a usability perspective, i think users should be able to access registers by name May 12 06:31:32 but not individual bits May 12 06:31:56 as you can see in my headers, I'm often torn between the two May 12 06:32:07 oftentimes I just document the bit allocation in the header May 12 06:32:20 but when these types of devices are taught in school, it's byte-wise access May 12 06:32:22 sometimes I experiment with bitfields May 12 06:33:04 its up to you though May 12 06:33:20 in case of the adc Step you can actually prepare the step config with nice accessors and then write as a single word May 12 06:33:30 but I won't pretend to know the One True Way May 12 06:33:35 I keep shifting myself May 12 06:34:00 python however does open up more possiblities due to its excellent support for metaprogramming May 12 06:34:34 but, I need to focus on other stuff May 12 06:37:32 btw, one warning: do not disable the adc (via control register) while it is active... first disable all steps and then wait or the FSM to go idle May 12 06:38:10 otherwise the adc can get confused to the point is requiring a system reset to recover (for some reason ADC is one of the few peripherals without any local reset!) May 12 06:48:21 i somehow doubt child structures will provide contiguous memory addresses May 12 09:11:00 ayjay: what do you mean? May 12 09:11:22 l3-sn-test uses nested structures May 12 09:18:49 hi all - DT property "interrupts" - numbering goes from zero ? May 12 11:01:04 hello all. I need help working with PRU on BBB. I tried following a lot of examples and tutorials but every experiment ends with the same "prussdrv_open" failure. This is my setup http://pastebin.com/XyjdECFH. Any idea? May 12 11:02:56 target is to blink a led every 500ms May 12 11:28:51 hi. i want to connect bbb with wifi dongle for wireless network connection. for dongle(driver) installation, i turned on bbb through ethernet cable. now i have successfully turned on dongle in bbb but one problem is occuring that is, whenever i need to turn on bbb i am unable to ssh it through dongle's ip. dongle is only allowing to ssh bbb when i connect ethernet cable in bbb. i mean dongle needs a push from ethernet cable to turn the May 12 11:29:27 once it is turned on through ethernet cable then i remove the ethernet cable and it is continued to turn on with dongle May 12 11:29:32 why is this so? May 12 11:30:57 i mean i want wireless connection and for this i dont want ethernet cable to come and givea push to dongle and it will then it shows its connectivity with bbb. May 12 11:31:04 plzz help me.... :( May 12 16:18:50 yeah zmatt i'm gonna have to revisit your example May 12 18:37:34 Hi all. May 12 18:37:45 Having an issue setting up my BBB Rev C with a static IP May 12 18:37:58 After every reboot it uses the one assigned by the local DHCP server May 12 18:38:07 Here is the Uboot version I am using May 12 18:38:07 U-Boot 2016.03-00001-gd12d09f (Mar 17 2016 - 16:16:15 -0500), Build: jenkins-github_Bootloader-Builder-351 May 12 18:38:17 and a pastebin with the uname -a and dmesg output May 12 18:38:18 http://pastebin.com/SxYmjfdc May 12 18:39:23 This is my interfaces file: http://pastebin.com/HfKetVpJ May 12 18:40:41 If I bounce the interface then it picks up the address I expect May 12 18:40:51 But when I reboot, it goes right back to a dhcp lease May 12 18:47:56 hi May 12 18:50:15 i want to change boot loader picture on debian. Can u help please also give any document that issue May 12 20:06:17 I've been working with boost unit tests, cross-compiling from debian. I got the build to work, but so far I haven't figured out how to run them from the command line. I am ofc still looking, but thought I'd toss out a query here to see what happens. May 12 20:06:48 why do you assume uboot is the problem? May 12 20:06:58 ah shit .. screen scroll lock May 12 20:07:00 nvm me May 12 20:11:54 Hah! It worked! I've been failing at this all day; ask and *poof*, answer already. \o/ May 12 20:14:55 Ragnorok: what was the issue? think I know someone with (native) boost issues .. May 12 20:16:45 Well first off it wasn't building; I thought it was but skipped a groove. Second, the missing piece was it creates a binary with BOOST_TEST_MODULE name that's runnable on the command line directly. Run that, tests go. May 12 20:17:21 Finally found that missing tidbit. Prolly wonky google foo today. May 12 20:19:21 I'm using fixtures and BOOST_AUTO_TEST_CASE, which seems pretty simple now that's working. Kinda like I hoped it would be. Few lines defining some test methods, few more defining objects and calling them. Done. May 12 20:24:41 Ragnorok: aritey May 12 21:05:10 if the PRU accesses outside memory via the OCP master ports, are all bets off on the timing certainties? May 12 21:05:34 i would imagine the access time of outside memory is a heuristic May 12 21:55:47 hello! May 12 21:59:44 Is anyone here? May 12 22:00:59 i am May 12 22:01:16 Awesome! Got time for a super-quick question? May 12 22:04:32 I'm just curious about Cloud9. I loaded my BBB with the latest Jessie version, yet Cloud9 doesn't seem to be here. I just wondered if it's still a thing with Jessie, and couldn't find anything that confirms or denies its existence. May 12 22:04:47 So I thought someone here might know May 12 22:25:18 <[Butch]> Yes, it should be there, but you may have to explicitily install the package. Unfortunately, I’m not near a BBB to check. May 12 22:26:44 <[Butch]> I know I have it on mine, and it’s running Jessie. **** ENDING LOGGING AT Fri May 13 02:59:58 2016