**** BEGIN LOGGING AT Wed Mar 29 03:00:04 2017 Mar 29 03:01:15 really? so i can usg gdb with -O1 if i -fno-schedule-insns{,2}? because that's the whole reason i've been -O0 Mar 29 03:02:26 or use -Og, it's designed for the purpose :) "optimize for debugging" Mar 29 03:05:34 yeah, hmm Mar 29 03:05:36 i'll check it out Mar 29 03:05:48 so you're a gcc guy? have you thought about migrating to llvm? Mar 29 03:06:59 I've used both, switched back and forth a few times a while ago, though I've been too lazy for that lately Mar 29 03:07:39 afaik clang is a bit more eager to miscompile your code into oblivion if you violated some obscure rule resulting in undefined behaviour than gcc is Mar 29 03:08:50 or maybe that's a thing of the past, I don't know :) Mar 29 03:29:51 Hi all Mar 29 03:30:15 I am working for the first time on beaglebone devices. I have BBGW with me.. Mar 29 03:30:27 I need some help wrt pin configuration. Is anyone here? Mar 29 03:32:04 hi Mar 29 03:41:27 bbgw-- Mar 29 03:44:19 ayjay_t: btw, this is a very useful pdf for better understanding the internals of the cortex-a8: https://web-beta.archive.org/web/20150101062932/http://www.arm.com/files/pdf/A8_Paper.pdf Mar 29 03:45:34 although I don't know if you have the prerequisite background yet to make good use of the info, in which case just file it somewhere in the queue ;) Mar 29 05:50:34 sometimes its good to jump ahead anyway, you know, you can kinda make up for the knowledge lost with googling Mar 29 05:51:34 although i do sorta wish i had a resource that tied it to my engineering background Mar 29 05:51:45 err i mean circuits Mar 29 06:05:07 in the end, it's all still just circuits ;) Mar 29 06:05:39 yeahhh but these block diagrams are a little high level Mar 29 06:05:41 i'm going to read it Mar 29 06:06:10 it'll be my first time looking at any micro* architecture Mar 29 06:06:36 my goal for this year is to see how slow of a processor i can get slither.io to run on Mar 29 06:06:42 the paper does dig down to circuit-level issues, such as things they did to get timing closure Mar 29 06:26:43 and that sounds like... a very worthy goal Mar 29 06:59:18 hahaha Mar 29 06:59:31 it's supposed to be symbolic haha but yeah Mar 29 07:02:34 gosh everything is weird with -O0 Mar 29 07:06:12 don't use -O0, the compiler will drool all over your compiled code Mar 29 07:26:11 Hi, is there anybody here? Mar 29 07:26:55 haha it really does Mar 29 07:27:29 Has anybody here tried the OpenBSD dist. on the beaglebone black? Mar 29 07:28:31 Either I couldn't get it to work, or it is severely limited on what it can do. Mar 29 07:35:23 bye Mar 29 08:30:28 asks about something obscure, gives it a whole 8 minutes before leaving... lol Mar 29 12:05:50 zmatt: well... 1) noob and 2) bsd user Mar 29 12:06:13 zmatt: especially the latter are the most entitled people i've met in OSS Mar 29 12:06:32 hi is anyone live? Mar 29 12:07:06 * KotH is pretty sure that some people are dead Mar 29 12:07:41 don't mind the corpses, just step over them Mar 29 12:08:59 * LetoThe2nd cranks up ice-ts body conut Mar 29 14:05:54 thinkfat: funky, the omap5 can shut down the main oscillator *and* remain functional :) Mar 29 14:07:44 generating the necessary clocks with a PLL being fed the 32768 Hz slow clock Mar 29 14:15:17 zmatt: wow Mar 29 14:15:21 zmatt: that's impressive Mar 29 14:16:21 zmatt: how can cortex-a8 with mmu disabled enter abort mode? undefined instruction is the only way, no? Mar 29 14:31:06 no, lots of ways Mar 29 14:32:50 mmu disabled just means you won't get a translation fault, but that's basically the only class of aborts that's excluded Mar 29 14:33:07 you can still get alignment errors, bus errors, etc Mar 29 14:34:02 mmu disabled is a situation you want to avoid as much as possible anyhow, normally enabling the mmu is among the very first things you do Mar 29 14:43:32 zmatt: sure, sure. I'm debugging my resume path and there the mmu is off until I restore the cp15 registers and the stack frame of the suspend function call Mar 29 14:48:46 zmatt: but it looks like my problem is mainly due to corrupted SDRAM content, probably because I botched the self refresh and EMIF save/restore Mar 29 14:50:00 that sounds like a fine way to get aborts soon thereafter Mar 29 14:50:38 zmatt: yeah, first code in ocmc ram is doing fine, then basically as soon as I get back to SDRAM, things are getting weird Mar 29 15:01:15 zmatt: btw reason that the wakeup wasn't working with MOSC off was that the UART0 module wasn't idled. Mar 29 15:03:05 zmatt: hmm, no, corruption comes from M3 firmware... Mar 29 15:21:33 naughty m3 Mar 29 15:27:53 NishanthMenon: are you knowlegeable about the m3 firmware? I saw commits from you in the git repo Mar 29 15:28:15 thinkfat, just a wee bit Mar 29 15:28:35 NishanthMenon: :-) Mar 29 15:28:40 NishanthMenon: well let Mar 29 15:28:55 NishanthMenon: well lets throw our bits of knowledge together ;) Mar 29 15:28:58 thinkfat, trying to get dgerlach in.. Mar 29 15:29:14 dgerlach, ^^.. thanks Mar 29 15:29:18 hi Mar 29 15:29:23 thinkfat: what's up? Mar 29 15:29:40 thinkfat: have some ddr corruption issues? Mar 29 15:29:53 dgerlach: I'm scratching my head about the "do_ddr" stuff in the V2 version of the commands Mar 29 15:30:23 dgerlach: ds_save() and ds_restore() seem to do more than they should do, especially, why do they fiddle with the DPLLs? Mar 29 15:31:02 thinkfat: well, that's more related to the fact that you should only fiddle with the dplls if DDR is going into self refresh Mar 29 15:31:25 thinkfat: we don't want to fiddle with dplls if DDR is active, which is the case in some cpuidle modes on am335x Mar 29 15:31:37 thinkfat: a bit of background, which kernel and which board are you on? just curious Mar 29 15:31:57 dgerlach: BBB A5A and homegrown OS Mar 29 15:32:53 dgerlach: but DDR DPLL is the only one that has a relation to the DDR, no? Mar 29 15:33:12 dgerlach: maybe CORE, too, because it drives EMIF? Mar 29 15:34:22 that's just the L3 interface clock Mar 29 15:34:28 EMIF doesn't care Mar 29 15:34:58 the DDR PLL is critical because there are DLLs locked to that and critical memory timings are dependent on it Mar 29 15:35:55 dgerlach: ok, so DDR DPLL is the only one that is critical for DDR functionality, right? Because I'm wondering why ds_save() also e.g. bypasses the MPU DPLL, that's something that should always be even if EMIF is not shut down Mar 29 15:37:14 thinkfat, which modes would bypass dpll but not place ddr in self refresh? Mar 29 15:37:24 thinkfat, possibly only cpuidle modes Mar 29 15:37:43 dgerlach: right... Mar 29 15:38:26 the mpu can do that itself Mar 29 15:38:37 thinkfat: we did formerly bypass MPU dpll in cpuidle, but we no longer do, because of a race when the cpu wakes back up, can't always guarantee that the m3 can relock the dpll before the mpu starts going again Mar 29 15:38:50 so you end up with mpu running at sysclk freq Mar 29 15:39:03 at least for a while... Mar 29 15:39:18 which isn't necessarily an issue provided both parties take it into account :) Mar 29 15:39:40 sure, however we had some issues with reliably relocking the mpu pll coming out of cpuidle Mar 29 15:39:48 and the power savings are very minimal Mar 29 15:40:00 ok, anyway the deepsleep modes are more of my concern now Mar 29 15:40:06 because the mpu clock is gated anyway Mar 29 15:40:15 thinkfat: ok, so you are seeing ddr corruption Mar 29 15:40:26 thinkfat: what leads you to believe it's the m3? Mar 29 15:40:35 m3 has no access to EMIF Mar 29 15:40:42 right now I'm testing DS1, the version without "do_ddr" works, the V2 version basically crashes on resume on return to SDRAM Mar 29 15:41:11 thinkfat: did you prepare EMIF correctly? Mar 29 15:41:24 zmatt: that's part of my ongoing quest Mar 29 15:41:55 it's helpful to do diff of emif registers before and after entering suspend mode Mar 29 15:42:05 if you have jtag access Mar 29 15:42:24 yeah, that I have. Mar 29 15:42:28 * thinkfat chuckles Mar 29 15:42:30 hehe Mar 29 15:42:38 at least DAP still works :) Mar 29 15:42:43 anything besides the performance counters different? Mar 29 15:43:03 I'll put that on the list of things to check Mar 29 15:43:08 ok Mar 29 15:43:14 thinkfat: I guess attempt restore, then spin in a deadloop to give you time to reconnect with debugger? Mar 29 15:43:24 zmatt: exactly Mar 29 15:43:26 yes Mar 29 15:44:03 debugging is not a problem really, not really convenient but not unbearable Mar 29 15:44:20 ok Mar 29 15:44:33 thinkfat's had a lot of fun with it though :D it appears there are some silicon issues with deepsleep and jtag Mar 29 15:44:58 jtag in general does not play nice with low power modeas Mar 29 15:45:05 based on evidence available it looks to me like TI might perhaps have connected CTI to the wrong reset signal Mar 29 15:45:31 it comes back from mpu poweroff in a completely whack state Mar 29 15:45:35 dgerlach: what about the other stuff in ds_save()/restore, like, set_ddr_reset(), ddr_io_suspend() etc? Mar 29 15:46:04 zmatt: not sure, no comment on that Mar 29 15:46:15 thinkfat: all of that should be fine if your ddr is in self refresh Mar 29 15:46:15 dgerlach: none requested or expected :-) Mar 29 15:47:13 thinkfat: sure, just happy to help with what i'm able to Mar 29 15:47:41 thinkfat: are you using u-boot? Mar 29 15:47:48 dgerlach: ok, so regarding preparation on the A8 side, all _V2 modes (standby, DS0, DS1) require EMIF context saved and EMIF disabled? Mar 29 15:47:51 dgerlach: yes Mar 29 15:48:28 dgerlach: u-boot, yes Mar 29 15:48:35 there is of course a bit of trickery when coming from low power mode since you need to reconfigure EMIF without messing up the ram, iirc there are control module registers to make sure EMIF can't do anything harmful before you configure it right Mar 29 15:48:47 by forcing CKE low Mar 29 15:48:59 zmatt, yeah and u-boot configures those registers, which is why i asked about u-boot Mar 29 15:49:11 yes but u-boot is not involved when coming out of deepsleep Mar 29 15:49:30 ok, but CKE forced low must be done only to keep DDR in self-refresh Mar 29 15:49:49 thinkfat: specifically to keep it in self-refresh while you reprogram EMIF Mar 29 15:49:50 and as soon as returning from SR, you need to release it again Mar 29 15:49:54 zmatt, not directly, but it programs the control_emif_sdram_config once and then that's used Mar 29 15:50:10 ah, ok Mar 29 15:50:11 dgerlach: ah true, is that sufficient? Mar 29 15:50:15 are you saving and restoring sd_cfg register Mar 29 15:50:21 zmatt: yes that's how we do it Mar 29 15:50:46 fair enough :) Mar 29 15:50:59 dgerlach: let me check, I think no. but I have some code that copies sdram config into the control module register Mar 29 15:51:03 maybe I should remove that Mar 29 15:51:09 you do NOT want to save and restore sd_Cfg register for ddr3, the hardware will populate it from the value programmed in control_emif_sdram_config automatically Mar 29 15:51:45 * zmatt has been having a lot of "fun" with emif initialization on omap5... *sigh* -.- Mar 29 15:52:32 zmatt: impossible not to have fun with the emif! Mar 29 15:52:49 I've never met initialization code *that* fragile Mar 29 15:52:56 it's more like a magic spell Mar 29 15:53:41 thinkfar, another piece of advice for DDR3 Mar 29 15:53:43 er Mar 29 15:53:46 thinkfat: ^^ Mar 29 15:54:08 you don't want to restore the entire PWR_MGMT control register at once on resume Mar 29 15:54:19 or better i should say Mar 29 15:54:47 you need to restore it with the Self Refresh bit set, as that's the state it was in when it lost context, and you likely saved the context before it was programmed to enter self refresh Mar 29 15:55:02 dgerlach: indeed Mar 29 15:55:17 so restore it *with* the bit set, and then after all config for the emif is loaded, clear just that bit from the register Mar 29 15:57:31 dgerlach: ok, that I do already Mar 29 15:57:42 ok Mar 29 15:58:15 thinkfat: if you hven't seen, latest emif code is here: http://www.spinics.net/lists/linux-omap/msg136346.html Mar 29 15:59:24 dgerlach: some additional registers saved, I see Mar 29 16:00:14 thinkfat: code also supports am437x Mar 29 16:00:43 thinkfat: which has even more registers, but there are probably a few extra 335x registers being saved, most important thing is the sequence of everything Mar 29 16:00:53 dgerlach: eh, why do you store PMCR into the shadow register only to immediately overwrite it? Mar 29 16:01:22 thinkfat: code that calls into the emif functinos is posted here: http://www.spinics.net/lists/linux-omap/msg136355.html Mar 29 16:01:46 thinkfat: in the resume path? Mar 29 16:02:12 dgerlach: yes Mar 29 16:02:17 https://ghostbin.com/paste/bk25k Mar 29 16:04:18 thinkfat: well, because I copy and paste too much and messed it up probably :P Mar 29 16:04:34 dgerlach: yeah, that code has a loong history Mar 29 16:05:19 dgerlach: btw, "module_disable_val" is another such anachronism. Mar 29 16:05:49 thinkfat: for sure, i sent the first version back in 2013 Mar 29 16:06:02 dgerlach: 0x30000 can be an immediate, i.e. mov r3, #0x30000 Mar 29 16:06:02 thinkfat: how so on module_disale_val? Mar 29 16:06:06 it cannot Mar 29 16:06:08 too big Mar 29 16:06:24 dgerlach: *cough* barrel shifter *chough* Mar 29 16:06:36 it's fine as immediate in arm and thumb2 Mar 29 16:07:14 both allow a fairly wide variety of immediates (not quite the same variety though) Mar 29 16:07:16 it's basically "mov r3, #3, lsr #16 Mar 29 16:08:09 eh, not lsr, lsl Mar 29 16:08:39 ok, gotta go now. Mar 29 16:08:46 dgerlach: thanks for the hints Mar 29 16:09:04 thinkfat: sure, no problem, good luck Mar 29 16:09:40 dgerlach: so, any advice for omap5 + dual rank ddr3 ? :) (besides flee and hide) Mar 29 16:10:10 and failing hardware leveling Mar 29 16:10:14 zmatt: sorry I'm a power management guy, only have to deal with the emif to wake it back up Mar 29 16:10:30 hehe, ok Mar 29 16:10:50 in that case, any advice for the ABE PLL being stuck in "transitioning" after warm reset? Mar 29 16:11:22 I know ABE is magic due to its involvement in low power states Mar 29 16:12:52 apparently for suitable use-cases you can run the entire device on just that pll (with main osc shut down) Mar 29 16:13:08 zmatt: sorry i'm unhelpful, not very familiar with omap5 in general Mar 29 16:13:42 it was a long shot :) not many people around probably who are familiar with that beast Mar 29 16:18:31 zmatt, i have seen that before Mar 29 16:18:44 zmatt, unfortunately, i am in the middle of a workshop and the next presentation is mine Mar 29 16:18:50 let me wrapup and respond .. Mar 29 16:19:24 NishanthMenon: no hurry :) Mar 29 16:20:46 yes i was gonna say, he may know Mar 29 16:22:00 Tero Kristo said something similar.. "ABE is notorious for this kind of issues I recall, due to custom clocking setup for that specific DPLL" Mar 29 16:22:59 the uevm took the lazy approach, it connected the warm reset output of the omap5 to the reset input of the PMIC, which causes it to reset to defaults and hard power-cycles the omap5 Mar 29 16:25:43 installing a 0ohm resistor in the right place defuses that mechanism and allows omap5 to experience warm resets normally... I still need to do that on my uevm Mar 29 16:32:25 zmatt, hi! any experience with touchscreens on wayland on beaglebone? :-) Mar 29 16:34:13 I have a little bit of experience with touchscreens on beaglebone, none with wayland Mar 29 16:34:24 wayland is still on my to-do list Mar 29 16:38:32 I kinda get touch events, but Qt doesn't see them properly :-( Mar 29 18:02:56 Hello. We just bought a beagleboard Black and a 4.3" LCD Display Cape. All the drivers installed properly and the PC recognizes the Beagleboard, but I can't figure out how to upload a JPG,BMP or some other type of image Generated by Windows Paint to display on the LCD. Do you have a procedure I can follow to upload our image file to the display? Mar 29 18:03:46 use an image viewer? Mar 29 18:03:56 is the display itself working? Mar 29 18:04:07 Yes. Beautifully! Mar 29 18:04:24 so there are lots of ways to display an image Mar 29 18:04:55 the crudest being writing the raw image data (16-bit or 24-bit color depending on the display) into /dev/fb0 Mar 29 18:05:00 Whats the easiest. this is for sales people to demo. Mar 29 18:05:09 use an image viewer Mar 29 18:05:43 ok. Say I use windows paint to generate an image. Mar 29 18:06:00 Then I upload it to the LCD how? Mar 29 18:06:36 scp/sftp Mar 29 18:08:07 I dont understand Mar 29 18:08:27 google for "sftp windows" Mar 29 18:08:47 OK. Mar 29 18:08:52 tons of sftp clients for windows it seems Mar 29 18:09:48 And this will explain how to upload on LCD? Mar 29 18:10:12 it will explain how to upload it to the beaglebone Mar 29 18:11:08 and then just open it in any image viewer Mar 29 18:39:59 Win SCP is now running on my PC. No references to the Beaglebone board which is still plugged in. Not sure what Host name, Username or Password to use for new site. Use anything? Mar 29 18:40:25 Is port 22 OK? Mar 29 18:42:14 What does ping timout have to do with it? Mar 29 18:42:44 Anyone there? Mar 29 18:47:00 I guess patience was low on supply Mar 29 18:48:33 I was in process of trying out how to upload an image to Beaglebone board connected to a 4.3" Display Cape LCD which is plugged into the PC and operating properly. Bone_D64 drivers installed properly and Start HTM is running properly on Chrome. Mar 29 18:48:54 ah you're back Mar 29 18:49:26 MattZ told me to download and install WinSCP onto my PC to upload an image to the PC, but there are no instructions. Mar 29 18:50:16 It promps with Login new site and asks for host name?, Port 22? Username? and Password? Mar 29 18:50:52 No of these are needed as I just want want the driver to upload an image file to the LCD Mar 29 18:50:55 same hostname as you use in the browser... isn't ssh'ing into the beaglebone anywhere in the quickstart or something? (it's been ages since I've taken a look at that) Mar 29 18:51:19 you can't reach the LCD *directly*... the LCD is attached to the beaglebone, not to your PC Mar 29 18:51:28 I dont use a hostname for Chrome. Mar 29 18:51:40 I click on thwe chrome icon and it lanches Mar 29 18:52:39 cna I cut and paste the image file into a directory in the Mass Storage Device and have it automatically execute Mar 29 18:53:29 Like Comuter/BeagleBone Getting Started/App/Display this image Mar 29 18:54:04 ehm Mar 29 18:54:37 I dont understand. Mar 29 18:55:36 the closest to that which is relatively easy to achieve is transferring the image (e.g. via sftp) to the beaglebone and have an image viewer running that notices when a new file is uploaded (I think e.g. "feh" can do that) Mar 29 18:55:58 I see lost of images in Mass Storage Device (E) Beagle Bone Getting Started/Docs/Images Mar 29 18:56:24 which are just images related to the getting started document Mar 29 18:56:40 Oh. Thats a shame. Mar 29 18:56:51 well, no, that's why they're there Mar 29 18:56:55 :P Mar 29 18:57:06 you seem to have strange expectations from the beaglebone Mar 29 18:57:14 So Win SCP is open and running Mar 29 18:57:20 it's a tiny computer, and you attached a screen to it Mar 29 18:57:20 what do i do? Mar 29 18:57:41 it's not going to magically know to display images for you on that screen, no computer does unless you explicitly run software on it to do so for you Mar 29 18:58:11 nor does it have access to stuff on your computer, hence the need to transfer images Mar 29 18:59:33 That makes sense. If it is able to be viewed by the PC as mass storage device, then you should be able to store or link to put images on the LCD Mar 29 19:00:09 It appears thet WinSCP is the Vehicle to upload the image to the LCD memeory buffer. Mar 29 19:00:21 no, to the beaglebone Mar 29 19:01:00 Correct. The Beaglebone. My Mistake. Mar 29 19:01:16 if you want a digital photoframe, maybe you should have bought a digital photoframe :P Mar 29 19:02:01 Thats exactly how I want this to operate. Mar 29 19:02:16 it could, yes Mar 29 19:02:40 But this is for a sales demo to sell a bunch of these. Mar 29 19:02:56 that sounds misguided Mar 29 19:03:21 But apparently It won't display a custom image I can easily upload to the beaglebone boards? Mar 29 19:04:04 many people who use beaglebones would be able to do so yes Mar 29 19:04:42 Ok. So where are the detailed instructions? Mar 29 19:04:45 but it doesn't do so *out of the box* with the simplicity you seem to be seeking Mar 29 19:04:48 there are none Mar 29 19:04:55 since it's not a digital photoframe Mar 29 19:05:15 it's a development system, a device which people use to create things Mar 29 19:05:37 all sorts of things, most of them not remotely related to photoframes Mar 29 19:05:41 Yep. That's why we bought it. Mar 29 19:06:54 using it as a digital photoframe is a task it could easily do, but that doesn't mean it's likely you will find detailed instructions for that particular application Mar 29 19:08:12 Is there an instruction how to use the FEH application you described above? Mar 29 19:08:46 is google broken? Mar 29 19:11:54 the only two questions you need to seek out for your end goal are "how do I get an image onto this linux system (the beaglebone)?" and "how do I view an image on a linux system?" both of which are extremely basic things, so please don't expect anyone here to hold your hand on this Mar 29 19:14:39 the only beaglebone-specific part about this that you need to know is that the usb connection between your pc and the beaglebone is (thanks to the drivers you installed) automatically configured as a network connection, so you can reach the beaglebone Mar 29 19:14:46 its IP address is in the quickstart Mar 30 01:24:41 hello fellow beagle lovers Mar 30 01:26:01 https://www.gofundme.com/charlies-spine-surgery Mar 30 02:41:43 hello , I am trying to build LKM in BeagleBone black first time but can't find a way to install correct kernel headers. My kernel version is beaglebone 4.4.54-ti-r93 . Where to find kernel header for this ? Mar 30 02:42:27 I tried this : sudo apt-get install linux-headers-`uname -r` but it showing error -> Unable to locate package linux-headers-4.4.54-ti-r93 Mar 30 02:42:49 E: Couldn't find any package by regex 'linux-headers-4.4.54-ti-r93' **** ENDING LOGGING AT Thu Mar 30 03:00:01 2017