**** BEGIN LOGGING AT Tue Feb 27 03:00:01 2018 Feb 27 05:33:05 Hi Feb 27 05:33:42 Is Beagle Bone Black board supported Vxworks RTOS Feb 27 05:33:53 ?? Feb 27 05:47:31 * zmatt . o O ( ask vxworks? ) Feb 27 14:06:36 Hello guys! I have a problem regarding the serial console. Feb 27 14:08:23 it is my first attempt with the BBB and I read the user manual, googled some stuff and have finally connected the serial console to a selfmade rs232tousb adapter. I can connect via putty, but cant write to the serial port. it asks me to log in, but if i type the passwd (and I see it typed cause i forced display of local messages in putty) it doesnt respond. Feb 27 14:09:16 its my only way to acces the BBB cause I also cant log in to SSH (connection refused) and have not found a error on my side and the manual + www did not gave ma a solution either Feb 27 14:10:23 Richtergung: RS232? that's bad! it needs to be UART with 3.3V Vref (although inputs are sort of 5V tolerant on the debug connector, only) Feb 27 14:10:51 my bad, i meant uart... just used the same adapter for some rs232 projects Feb 27 14:11:03 it is at a 3.3V level Feb 27 14:11:30 try a loopback test first Feb 27 14:11:49 connect tx to rx on the adapter and check if you see your typing Feb 27 14:12:01 will do now Feb 27 14:25:35 with putty i could not see anything at all now. even with forced local echo i could not see what I wrote... strange, will test again with another program Feb 27 14:27:14 connecting rx to tx should show you what you are typing, no local echo necessary (that would actually double the output) Feb 27 14:29:03 ok, i tried again, i can write, and i see what im typing Feb 27 14:29:19 i also see the serial output of the bb if connected Feb 27 14:30:03 then the adapter works Feb 27 14:30:26 verify that you have the right pins hooked up Feb 27 14:30:53 yes, it also does with other projects... yeah they are alright, i checked them first Feb 27 14:32:13 is this a new BBB? Feb 27 14:35:19 * tbr has to leave now, bbl Feb 27 14:35:23 no, but i put in a fresh os from the bbb-website on a sd card Feb 27 14:35:34 oh ok, thank you Feb 27 14:35:47 appreciate your help Feb 27 14:57:48 if this is a used device, maybe the input is shot? Feb 27 15:23:55 Could anyone here download the following repo from github and compile the QML apps for performance testing? Feb 27 15:24:04 https://github.com/Furkanzmc/QML-UI-Animations Feb 27 15:24:32 I cloned the repo and compiled the 4 project Feb 27 15:24:38 but Menu-by-Volorf is laggy Feb 27 15:25:03 i can't understand what is the problem. Feb 27 16:34:43 has anyone else noticed spi mosi looks a little unusual? Feb 27 16:36:30 https://imagebin.ca/v/3tASjLJDwg98 Feb 27 16:37:04 this is with the spidev_test tool https://github.com/torvalds/linux/blob/master/tools/spi/spidev_test.c Feb 27 16:37:16 tried with 2 different beaglebones Feb 27 16:38:02 it's at 20mhz. I'm wondering if its a termination thing. Feb 27 16:38:19 the board is plugged into a 4d systems lcd cape, which breaks out the spi pins on different headers Feb 27 16:43:51 I am looking to use the beagleboard black wireless to capture Bluetooth Low Energy beacons and the performance is way worse than expected. Feb 27 16:44:02 can anyone help with this. Feb 27 16:51:24 Anyone with GSL1680 touch controller? Feb 27 16:51:38 http://linux-sunxi.org/GSL1680 Feb 27 17:49:00 I just traced the spi MOSI track and it also goes to a button. By cutting the trace close to the pin I've doubled the SPI clock speed to 40Mhz with no problems (yet). Feb 27 18:08:55 zmatt: Is there some way to map the DRAM in the assembly code? Feb 27 18:13:27 The X15 board...not release yet? Does it have PoE? Feb 27 18:37:02 hey buds, can one of you folks with a BBB run hdparm on the onboard emmc real quick? Feb 27 18:37:38 # hdparm -Tt /dev/mmcblk0 Feb 27 18:39:37 i replaced the kingston and put a sandisk 16G on it Feb 27 18:40:19 here are my readings: Feb 27 18:40:28 [root@alarm /]# hdparm -Tt /dev/mmcblk0 Feb 27 18:40:30 /dev/mmcblk0: Feb 27 18:40:32 Timing cached reads: 530 MB in 2.00 seconds = 264.77 MB/sec Feb 27 18:40:34 Timing buffered disk reads: 64 MB in 3.08 seconds = 20.80 MB/sec Feb 27 18:44:15 jman_ X15 is out, but no PoE. Feb 27 18:44:48 There is a BeagleBone PoE reference design as well as PoE cape Feb 27 19:44:56 in using SBCO, when we use an offset, is it in number of bytes? Feb 27 20:00:50 Hello? Feb 27 20:00:57 http://www.catb.org/esr/faqs/smart-questions.html Feb 27 20:01:13 I'm currently looking for the entire list of software compatibility for BeagleBoard-X15 Feb 27 20:01:58 i don't know that it's even possible to provide such a complete list Feb 27 20:02:07 what are you really wanting? Feb 27 20:02:25 or why do you want this? Feb 27 20:02:57 while that's being generated, can you also throw in a complete list of all the critters in the 7 seas Feb 27 20:04:28 Raf_: better to describe your basic goals first... Feb 27 20:06:26 I think this will need a computer the size of a planet and suspect the answer might be just "42". Feb 27 20:14:17 basically, everything that has to do with JavaScript, from building to even emulate if it's possible Feb 27 20:14:36 Also, write python and more languages Feb 27 20:14:39 Does anyone know the official operating temperature range of the X15? Feb 27 20:30:31 Cicero: the X15 TRM should know that Feb 27 20:30:36 err SRM Feb 27 22:40:02 p Feb 27 22:49:12 cnomad: which of the two kingston eMMC variants used on beaglebones do you want to know? :) Feb 27 22:50:22 EMMC04G-S100-A08U is the one I pulled out Feb 27 22:51:11 oh also I may have read the sd card by accident, Feb 27 22:51:54 lo Feb 27 22:51:55 l Feb 27 22:52:25 mmcblk0 is sd card yes Feb 27 22:52:28 eMMC is mmcblk1 Feb 27 22:53:51 and ok, the latest eMMC used... hmm, lemme see if I can still find a beaglebone with that eMMC that's still in MLC mode... for all our production beaglebones we reconfigure the eMMC into SLC mode Feb 27 22:54:26 jyothi[m]: please just talk in channel, not privately Feb 27 22:57:41 also, it sounds like your question might be related to gsoc? if so, please use #beagle-gsoc instead Feb 27 23:10:42 cnomad: https://pastebin.com/raw/GL02aAAT Feb 27 23:11:01 cnomad: i.e. it's limited by the interface speed, not by the eMMC Feb 27 23:11:47 (pretty much) Feb 27 23:12:58 same for your sd card btw (it only 4 data lines instead of 8, hence half the speed compared to eMMC) Feb 27 23:13:47 Thanks to some help yesterday I have my RTEMS exe loading and it runs. Nice and thank you. I can set a break point and when hit execution stops however stepping and next do not. I do not leave the breakpoint which indicates an OpenOCD cache set up issue. Is there any info setting OpenOCD and L2 caches on this CPU? Feb 27 23:14:49 why would cache matter for stepping? Feb 27 23:15:03 oh right Feb 27 23:15:09 The breakpoint is remove and not written back to memory Feb 27 23:15:19 uhh, you're not using hardware breakpoints? Feb 27 23:15:28 or aI mean not read, JTAG comes in at the RAM level Feb 27 23:16:01 GDB and so it is doing the work. Breakpoints is just one issue, changing a value is another. Feb 27 23:17:25 it seems odd to me that you'd need to configure anything for that, since cache management should be the same across all ARM Cortex-A cores Feb 27 23:18:04 (this aside from the fact that I'd expect it to use hardware breakpoints when they're available) Feb 27 23:18:48 zmatt: https://pastebin.com/raw/Qs19LwS4 Feb 27 23:18:55 and yeah makes sense Feb 27 23:19:30 this device appears to store some stuff in the rpmb Feb 27 23:19:30 cnomad: ok, so your new eMMC still manages to squeeze a little bit of extra performance out of the bus Feb 27 23:19:36 lol Feb 27 23:19:48 ricing my BBB what can you say Feb 27 23:20:00 uhh, rpmb should not be initialized when you buy a fresh eMMC Feb 27 23:20:19 it should still be unkeyed Feb 27 23:20:31 why did you replace the eMMC btw? Feb 27 23:20:33 the real reason is an extra cheap emmc reader to dump fw off a device i was looking at Feb 27 23:20:39 heh Feb 27 23:20:42 so, exected Feb 27 23:20:47 oh lol Feb 27 23:20:55 For L1 it is however my experience on Zync you need to tell OpenOCD about the L2 controller. I cannot see one on BBB CPU in the TRM Feb 27 23:21:09 so now I'm wondering if I can bypass it Feb 27 23:21:25 haven't had that much experience with emmc stuff Feb 27 23:21:26 kiwichris: L2 is integrated in the ARM core and responds to the architecturally defined cache maintenance instructions Feb 27 23:21:54 (there are SoCs with separate external L2 cache, but this isn't one of them) Feb 27 23:22:28 cnomad: you want to try to read the rpmb without the key? Feb 27 23:22:40 that sounds... hard Feb 27 23:23:12 there are tricks but I expect it to be hard on more modern chips Feb 27 23:23:29 I'll prolly leave that one as a longer term project Feb 27 23:23:49 maybe it's possible to find and exploit a security vulnerability in the eMMC's firmware :) Feb 27 23:23:50 but yeah, the jdec spec was pretty helpful Feb 27 23:23:55 zmatt: thanks, I will take a closer look at OpenOCD and its configuration. Feb 27 23:24:10 kiwichris: but... Feb 27 23:24:35 kiwichris: I'm pretty sure u-boot leaves caches off when transferring execution to whatever it's booting Feb 27 23:24:46 iirc you can also build u-boot to leave caches disabled entirely Feb 27 23:25:53 zmatt: RTEMS starts fine and it configures the MMU and caches and this is why I have needed extra set up. Feb 27 23:26:05 ah ok Feb 27 23:28:35 kiwichris: ok, if openocd is truly not flushing caches when modifying code, that would need a bug report, since it most definitely is supposed to Feb 27 23:30:25 zmatt: For L1 yes for L2 it seems to be more complicated. For example there is a command `am335x.cpu cache l2x conf ` which lead me to ask my question. I suspect this is part of the generic support for ARM and not valid with this device. I may need to find the command for L2 being via cp15 or whereever. Feb 27 23:31:37 I noticed that command, I have no idea what it could possibly do, and the OpenOCD source code has a /* FIXME: remove it */ on that command Feb 27 23:31:47 zmatt: OpenOCD is reporting is knows about L1 I and D and L2 D .... Feb 27 23:31:52 cache configuration is automatically queried from the cpu Feb 27 23:33:22 but if you have further questions about openocd, you might want to try #openocd Feb 27 23:34:12 Hmm hit a break point in `main` and OpenOCD is reporting `MMU: disabled, D-Cache: disabled, I-Cache: enabled`. I will any sure the BBB has the MMU and data caches on but I need to check. Feb 27 23:34:18 zmatt: I'm thinking maybe rigging something up to mitm the key to unlock the rpmb. i need to look at the spec sheet more, but I'm guessing it's being xferred over the cmd pin? Feb 27 23:34:34 is it a symmetric key? Feb 27 23:34:55 zmatt: yes on #openocd Feb 27 23:34:56 I'll look through the spec sheet in a few, just wondering if you know off the top Feb 27 23:35:08 zmatt: thank you Feb 27 23:35:50 cnomad: I don't remember the full details... iirc it used hmac-sha1 authentication or something like that, but I don't remember if it's also encrypted... I don't think so? Feb 27 23:40:19 https://www.slideshare.net/linaroorg/intro-to-emmc Feb 27 23:40:24 zmatt: slide 4 Feb 27 23:41:29 hence the "replay" in "replay protect memory block" Feb 27 23:41:37 yeah Feb 27 23:42:45 ok so chall-response Feb 27 23:44:15 yeah poking at emmc fw is on my todo list now Feb 27 23:44:38 mb i can fuzz it radamsa style for now? **** ENDING LOGGING AT Wed Feb 28 03:00:01 2018