**** BEGIN LOGGING AT Sun Oct 27 02:59:58 2013 **** BEGIN LOGGING AT Sun Oct 27 12:14:10 2013 Oct 27 21:11:17 lumag: ping Oct 27 21:15:04 ant_home, pong Oct 27 21:15:15 I saw your message regarding collie nor Oct 27 21:15:20 hello Oct 27 21:15:36 yes, I've still some doubts about geometry Oct 27 21:15:57 see: jedec_probe detects (correctly) 2 x16 chips on a 32 bit bus Oct 27 21:16:17 CFI detection fails, I think because of that geomnetry Oct 27 21:16:33 ant_home, If you have correct options, it should work. Oct 27 21:16:37 Let me check Kconfig Oct 27 21:16:47 now, on page 5 of the service man, you'll see the schema Oct 27 21:17:20 and on page 64 the wirings Oct 27 21:18:01 I think you need MTD_CFI_ADV_OPTIONS, MTD_CFI_GEOMETRY, MTD_CFI_I2 and MTD_MAP_BANK_WIDTH_4 Oct 27 21:18:11 And maybe MTD_MAP_BANK_WIDTH_2 Oct 27 21:18:12 yes Oct 27 21:18:19 Hmm. Just wanted to be sure. Oct 27 21:18:53 http://paste.debian.net/62366/ Oct 27 21:19:04 What do you see in dmesg, if you enable DEBUG_CFG (cfi_probe.c, line ~21)? Oct 27 21:19:09 still, I see strange bitshifting Oct 27 21:19:41 using cfi_probe instead of jedec_probe is silent.. Oct 27 21:19:42 just Oct 27 21:19:43 gen_probe:genprobe_ident_chips: CFI: Found no sa1100-0 device at location zero Oct 27 21:19:54 it fails getting Q R Y Oct 27 21:20:56 Is that with DEBUG_CFI? Oct 27 21:22:23 yes, and a bit more debug in Oct 27 21:22:38 cfi_cmdset_0001 Oct 27 21:22:39 -/* #define DEBUG_LOCK_BITS */ Oct 27 21:22:39 -/* #define DEBUG_CFI_FEATURES */ Oct 27 21:22:39 +#define DEBUG_LOCK_BITS Oct 27 21:22:39 +#define DEBUG_CFI_FEATURES Oct 27 21:22:39 . Oct 27 21:22:47 .-/* #define DEBUG_LOCK_BITS */ Oct 27 21:22:47 -/* #define DEBUG_CFI_FEATURES */ Oct 27 21:22:47 +#define DEBUG_LOCK_BITS Oct 27 21:22:47 +#define DEBUG_CFI_FEATURES Oct 27 21:22:48 . Oct 27 21:22:53 sry Oct 27 21:23:11 n/p Oct 27 21:24:33 unfortunately this case of two interleaved 16x on 32 bit bus is not covered in Oct 27 21:24:35 https://www.google.it/url?sa=t&rct=j&q=&esrc=s&source=web&cd=3&cad=rja&ved=0CD8QFjAC&url=http%3A%2F%2Fwww.jedec.org%2Fsites%2Fdefault%2Ffiles%2Fdocs%2Fjesd68-01.pdf&ei=ZIRtUv-pF8jAtAaM2IGYCw&usg=AFQjCNECILwhkz8ERhCQvdSbq-XnE4krKA&sig2=1Gy6tNnJOaEbLBRyrfIuwA&bvm=bv.55123115,d.Yms Oct 27 21:24:39 uuu Oct 27 21:24:58 next time shorter url ;) Oct 27 21:25:31 anyway, jedec_probe is ok for the moment Oct 27 21:26:03 now, how should I start to debug the fact that I can unlock only if MTD/CFI is built as module? Oct 27 21:26:38 I've added some unlock fixups for the sharp chip but the kernel doesn't boot if I apply to built-in modules Oct 27 21:27:13 and from userspace, flash_unlock fails in the same way if no modules Oct 27 21:27:27 sounds like some bug to me... Oct 27 21:30:28 Regarding first problem: I would suggest to add few debug lines (interleave, device_type, width) to genprobe_new_chip() function. Oct 27 21:30:45 ok Oct 27 21:32:01 you know a last doubt was the chip were working in 8bit mode (the old driver could do this...) Oct 27 21:32:27 but I see BYTE# is connected to VPP and VCC3 so should be high = 16bit Oct 27 21:32:42 at page 5 Oct 27 21:33:01 Maybe it is not fully CFI-compatible? Oct 27 21:33:03 and fwiw the datasheet never mention 8 bits mode Oct 27 21:33:16 At least NOR datasheet does not talk about 'Q/R/Y' support Oct 27 21:33:18 well, it seems it is CFI 1.3 Oct 27 21:33:37 at least the datasheet says so Oct 27 21:33:57 strangely the cmdset is also 3 (INTEL_STANDARD) Oct 27 21:34:31 but it is stated it is 'Intel Extended' and in fact there are the unlock operation typical of intel extended standard Oct 27 21:34:57 there ias an appendix... Oct 27 21:35:50 I just don't find Query support in table 6 (page 10). Oct 27 21:36:13 Note: I'm not an mtd expert. Oct 27 21:36:29 You might have better luck asking on linux-mtd ML Oct 27 21:37:02 http://www.datasheetarchive.com/dl/Datasheet-019/DSA00340384.pdf Oct 27 21:37:14 page 62 Oct 27 21:38:17 Hmm. Oct 27 21:40:22 the datasheet also says: Cross-Compatible Command Support• Basic Command Set• Common Flash Interface (CFI) Oct 27 21:42:11 hm.. on page 13 of the service manual it talks about the LOCOMO-QFP15-128pin G/A (SLA5075H) is a gate array Oct 27 21:42:19 what does it decode? Oct 27 21:42:33 cs0 is flash, isn't? Oct 27 21:44:47 it should detect connected devices and adapt for them Oct 27 21:45:21 Let me check in schematics Oct 27 21:45:45 yes, pls Oct 27 21:49:00 MCS10_B is CE1 on both nor chips Oct 27 21:49:11 no Oct 27 21:49:15 MCS00_B is CE1 on both nor chips Oct 27 21:49:52 MCS10_B is unconnected (but it might be used to control CE2 - probably when a single physical chip has two logical chips Oct 27 21:52:21 The rest of mcs lines are not connected Oct 27 21:53:48 It looks like we can ignore it Oct 27 21:55:49 anyway, the wirings D0-D15 and D16-31 are on the separate chips..interleaving 2 is not in discussion I'd say Oct 27 21:56:17 I don't understand exactly about the pins for address bus Oct 27 21:57:54 A0-A21 for 64M Oct 27 22:00:10 A21 is (probably) unused, Oct 27 22:00:20 The rest give 2^21 * 32 = 64M Oct 27 22:00:34 seems A0-A20 is 32M Oct 27 22:00:58 page 7 of _appendix Oct 27 22:01:37 8 in detail Oct 27 22:02:37 Stop Oct 27 22:03:22 2^22 * 16 * 2 = 128M / 8 = 16 MB Oct 27 22:06:59 so basically when sa1100 writes 0x00FF to the NOR, with 32 bits , the 0x00 is on one chip and the 0xff on the other? Oct 27 22:07:37 so it is in fact like a single big chip, 32 bit wide Oct 27 22:07:52 right? Oct 27 22:08:57 Yes Oct 27 22:09:23 Only mtd layer should know about "interleaving". Oct 27 22:09:34 Because it should be able to work with each chip. Oct 27 22:09:40 I've found some old thread about that.. hmm.. Oct 27 22:10:23 For the rest of the system, NOR chips (no matter what configuration) look like one bin ROM (of course if CPU's bus is properly setup). Oct 27 22:17:02 hm.. see this http://www.infradead.org/pipermail/linux-mtd/2004-August/010246.html Oct 27 22:17:29 obsolete probably Oct 27 22:17:43 genprobe_new_chip nr of chips 2 Oct 27 22:17:44 number of CFI chips: 1 Oct 27 22:19:41 I'd expect a similar detection Oct 27 22:19:56 phys_mapped_flash: Found 2 x16 devices at 0x0 in 32-bit bank Oct 27 22:20:21 like I get with jedec_probe Oct 27 22:20:24 sa1100-0: Found 2 x16 devices at 0x0 in 32-bit bank Oct 27 22:30:32 lumag_: thx for the confirmations Oct 27 22:31:22 I'll try to ask dwmv2 or dedekind on #mtd or linux-mtd Oct 27 22:31:36 better to separate the issues Oct 27 22:32:06 first module handling Oct 27 22:32:17 second failed CFI detection Oct 27 22:32:50 if we get the first solved we can boot from jffs2/ubifs again ;) Oct 27 22:36:08 basically the fixup just does add MTD_POWERUP_LOCK to MTD_CAP_NORFLASH (MTD_WRITEABLE | MTD_BIT_WRITEABLE) Oct 27 22:37:20 gross-hack was adding it in uapi/mtd/mtd-abi.h ;) Oct 27 22:38:16 thx again, gn Oct 28 00:00:52 ant_home, :) **** ENDING LOGGING AT Mon Oct 28 02:59:58 2013