**** BEGIN LOGGING AT Wed May 25 23:59:56 2005 May 26 03:20:15 Yo G. May 26 06:04:52 ping ep1220 May 26 06:43:40 kitno455: I am here now May 26 06:57:06 ep1220, g2 get you the data about reset pin? May 26 06:57:41 kitno455: Just saw You updated the wiki May 26 06:57:46 Thank You !! May 26 06:58:04 i am only 85% sure of the data May 26 06:58:14 OK. Do You have a scanner ? May 26 06:58:21 i sanded some of those traces off when i cleaned the board May 26 06:58:46 i write scanner software for a living, and am the SANE fujitsu backend maintainer. yes, i have scanners :) May 26 06:59:10 Could you scan the 2 sides an post as TIFF ? May 26 06:59:18 of the PCB I mean May 26 06:59:42 sure, board is a little warped, so it may be out of focus, but i can try May 26 06:59:55 also, some traces sanded off May 26 07:00:11 Anyway, I than could overlay them in Photoshop May 26 07:00:15 does it make sense to you that RESET_IN_N is connected to pin 15 on flash? May 26 07:01:01 is puzzling me. Maybe disable programming while in reset ? May 26 07:01:22 i guess May 26 07:01:30 I try to identify Q8. Could be a reset Chip - so this makes sense May 26 07:01:38 you think bus outputs are unstable during reset? May 26 07:01:46 want to avoid accidental write? May 26 07:02:06 something like this. May 26 07:02:41 i could try to figure out where rest of Q8 pins go May 26 07:02:54 I will verify Q8/1 reset functionality with an oscilloscope. May 26 07:03:17 Q8 could be: http://www.jlink.com.tw/Datasheet/EM/EM6325_ds.pdf May 26 07:03:22 right, have not touched slug with my scope yet May 26 07:04:27 huh, a swatch watch May 26 07:04:44 ?? May 26 07:05:01 the company that makes q8, swatch May 26 07:05:14 I see. May 26 07:05:33 you might be too young to remember those :) May 26 07:06:18 Old enough to know them :-) May 26 07:06:28 can you tell me (in laymans...) why RESET_IN_N is needed as a part of JTAG? May 26 07:06:50 JTAG allows to write code into the Xscale cache. May 26 07:07:05 For this to work the CPU must be held in reset during the write. May 26 07:07:27 wonder why you cant do that thru jtag itself? May 26 07:08:21 I can assert a "keep-reset" in JTAG. but the doc says RESET_IN must be active at this time May 26 07:08:35 ok, follow the doc May 26 07:08:44 Maybe the CPU could crash/hang/.. May 26 07:09:03 esp. in casese were there is no working FLASH/RAM May 26 07:09:04 if you are right about q8, pin 4 is a manual reset May 26 07:09:37 Yes. May 26 07:09:40 pull it low, and see what happens :) May 26 07:10:02 i noticed last night TP1 on back of slug May 26 07:10:06 you seen that? May 26 07:10:20 No May 26 07:10:31 under processor on back May 26 07:10:38 i had not noticed it till now May 26 07:10:50 connected to AD12 (PLL something) May 26 07:11:11 see it now May 26 07:11:15 not sure why you want that? May 26 07:11:55 I believe it signals when the PLL is locked (?) May 26 07:12:14 what does pll in cpu lock to May 26 07:12:39 the external clock is lower than CPU clock. May 26 07:12:52 There is a PLL to get the higher clock speed. May 26 07:13:08 Some ops must not be done while the DLL is locked. May 26 07:13:28 wonder if that explains the slugs apparent spee dproblem? May 26 07:13:57 I am new to the slug. Bought yesterday, opened yesterday. May 26 07:14:03 So i ca not say. May 26 07:14:26 its a neat toy May 26 07:14:43 though i intend to put it to work :) May 26 07:14:51 likely, i am working on a JTAG controller. May 26 07:15:03 And it is a cheap "victim" for tests. May 26 07:15:08 and experiments May 26 07:15:23 i am aware of your usb jtag project, i think May 26 07:16:07 i have played a little with toys using opencores code May 26 07:16:26 but i have very little useful HW experience May 26 07:16:49 I doing HW a longer time May 26 07:17:21 often with JTAG for debugging. May 26 07:17:47 you use comercial jtag equipment? May 26 07:18:16 I used several. Primarily did DSP May 26 07:18:44 right. now you try for opensource jtag programmer? May 26 07:20:02 I more into debugging. May 26 07:20:17 and the JTAG hardware. May 26 07:20:31 Hope someone else will add FALSH programming May 26 07:20:50 ep1220: flash programming is fairly easy May 26 07:20:51 cool May 26 07:21:04 ep1220: especially when most of the chips are cfi compliant May 26 07:21:31 prpplague: But still takes time to write and test :-) May 26 07:21:57 true, but it really straight forward work May 26 07:22:36 prpplague: that is good, more likely someone might take it May 26 07:22:57 well prpplague, i guess you got some code to write May 26 07:23:55 kitno455: hehe, well i'd be interested in doing it, however i'm currently 2 weeks behind on my BSP :( May 26 07:24:17 ep1220, you need anything else, you let me know. anoah AT pfeiffer DOT edu May 26 07:24:24 will take some time till HW is available anyway .. May 26 07:24:49 kitno455: Thanks. I will take You up on this offer. May 26 07:25:01 ep1220, send me email, i will notify you when i make tiffs of board May 26 07:25:06 adios May 26 07:25:33 will do May 26 07:25:36 bye May 26 11:17:04 prpplague: hey man May 26 12:44:55 beewoolie: hey May 26 12:48:06 prpplague: Hey. We're on openslug talking about some things. May 26 12:48:24 ok May 26 12:48:35 sometime i would be interested in? May 26 12:48:38 thing May 26 15:07:15 hiya kitno455 May 26 15:07:23 re May 26 15:07:36 whats up there May 26 15:08:02 well...thinking about upgrades to the slug. May 26 15:08:07 like? May 26 15:08:12 ram/flash? May 26 15:08:22 ya May 26 15:08:36 and things like g2 and others are talking about May 26 15:08:36 yeah, g2 asked me to look at traces May 26 15:08:47 i have not had a chance May 26 15:09:08 i dont really understand myself. May 26 15:09:30 I definately don't understand myself.... May 26 15:09:37 i like to play, but there are much easier ways to get small machine with 64 megs May 26 15:10:14 stilll for under $100 (with mods) its pretty cheap. May 26 15:10:29 sure **** BEGIN LOGGING AT Thu May 26 23:17:54 2005 **** ENDING LOGGING AT Thu May 26 23:59:56 2005