**** BEGIN LOGGING AT Thu Sep 08 02:59:56 2005
Sep 09 01:13:58 <ep1220> ka6sox: Still awake or already awake ;-)
Sep 09 01:15:41 <ka6sox> still
Sep 09 01:15:49 <ka6sox> not sleeping much these days...
Sep 09 01:16:14 <ep1220> hopefully paid work :-)
Sep 09 01:16:33 <ka6sox> some.
Sep 09 01:16:59 <ep1220> I was wondering  what Your plans about the FTDI jtag are
Sep 09 01:16:59 <ka6sox> I had to go to a funeral last weekend so there went my time for finishing the layout.
Sep 09 01:17:09 <ep1220> sorry, to hear this
Sep 09 01:17:28 <ka6sox> but I like the FTDI JTAG solution better than most.
Sep 09 01:17:43 <ka6sox> its plenty fast and should be easy to implement.
Sep 09 01:17:52 <ka6sox> (software wise)
Sep 09 01:18:01 <ep1220> Well, speed depends on what You do.
Sep 09 01:18:11 <ep1220> JTAG clock is high
Sep 09 01:18:29 <ep1220> but You loose time on USB communication
Sep 09 01:18:59 <ep1220> When You have to switch read/write direction it gets slow
Sep 09 01:19:44 <ep1220> eg. if You poll for a change in a bit . You get one poll per millisecond
Sep 09 01:19:47 <ka6sox> in our case its downright painful to program a Xscale with 256KB of Bootloader from a wiggler.
Sep 09 01:20:01 <ep1220> How long ?
Sep 09 01:20:07 <ka6sox> 40 minutes
Sep 09 01:20:15 <ep1220> Argh ..
Sep 09 01:20:37 <ka6sox> 498bits is a lot to push through
Sep 09 01:21:14 <ka6sox> no MIPS shortcuts
Sep 09 01:21:38 <ep1220> With FTDI You could get 1K/sec (slowest modes)
Sep 09 01:22:23 <ka6sox> 1K bits/sec or words per second?
Sep 09 01:22:31 <ep1220> Bytes
Sep 09 01:22:49 <ka6sox> so under 6 minutes to program it...a big savings
Sep 09 01:23:13 <ep1220> If You use the CPU as well (and have RAM working) , you can get as fast as the FLASH can go
Sep 09 01:23:20 <ka6sox> makes bootloader developement a lot les painful.
Sep 09 01:23:40 <ep1220> With out RAM I estimate 16KBytes/sec
Sep 09 01:23:45 <ka6sox> that has been discussed...I would like to see what that might do.
Sep 09 01:24:13 <ep1220> Yuo do not need to shift 498 bits, but only 16 bits per word.
Sep 09 01:24:36 <ep1220> Plus a little overhead (like baseaddress, num of words )
Sep 09 01:24:41 <ka6sox> ya
Sep 09 01:25:07 <ka6sox> how would you propose to fill the ram?
Sep 09 01:25:20 <ka6sox> (to be flashed?
Sep 09 01:25:48 <ep1220> There is a FLASH Prog stub in X-scale cache.
Sep 09 01:26:29 <ep1220> It takes data from JTAG (approx 40 clocks to transfer 32bits)
Sep 09 01:26:39 <ep1220> and stores into RAM
Sep 09 01:26:48 <ep1220> This can be done with minimal handshake
Sep 09 01:26:55 <ka6sox> cool
Sep 09 01:27:00 <ep1220> Then prog from RAM to FLASH
Sep 09 01:27:26 <ep1220> If there is no RAM, only internal registers can be used as buffers.
Sep 09 01:27:39 <ep1220> Well, maybe also the onchiop data-chache (?)
Sep 09 01:28:34 <ka6sox> k
Sep 09 01:28:59 <ka6sox> sounds like a reasonable method for programming up the bootloader partition.
Sep 09 01:29:36 <ka6sox> and might lead to some fixes to RedBoot to enable FatSlugs (our name for NSLU2's with more memory added)
Sep 09 01:30:17 <ep1220> the bootloader is 256K ?
Sep 09 01:30:42 <ka6sox> yes..with the ethernet code
Sep 09 01:31:08 <ep1220> Do You know how many people would be interested in this ?
Sep 09 01:31:25 <ka6sox> 5 that I personally know of.
Sep 09 01:31:33 <ka6sox> 3 who are doing work on bootloaders.
Sep 09 01:31:47 <ka6sox> I"m interested because of fattening slugs.
Sep 09 01:32:17 <ka6sox> (and I presume others would be interested too for the same reason.
Sep 09 01:32:44 <ka6sox> I'm sure there are others too.
Sep 09 01:33:45 <ep1220> I could have built a small run of FTDI base-PCBs. Also include circuit to have it like 1.5-3.3V compatible
Sep 09 01:34:25 <ka6sox> I would buy one now.
Sep 09 01:34:30 <ep1220> I guess DLP2232 plus this board + parts would come at something like 65-70USD
Sep 09 01:34:56 <ka6sox> especially if it allows us to make things easier to program.
Sep 09 01:35:04 <ka6sox> been holding things up.
Sep 09 01:35:48 <ep1220> Could You contact the  others if this price range is OK ?
Sep 09 01:36:01 <ep1220> I could make the PCBs only.
Sep 09 01:36:51 <ep1220> Or try to see if price comes down if I buy parts in slightly larger quantitities and sell on PCB+parts
Sep 09 01:37:27 <ep1220> One thing: the speed-up is for XScale only.
Sep 09 01:37:45 <ep1220> ARM and MIPS woudl be slower.
Sep 09 01:40:53 <ka6sox> MIPS has eJTAG and if we could crack that it would be faster too.
Sep 09 01:41:02 <ka6sox> I'm also thinking about PPC
Sep 09 01:41:15 <ep1220> Do not know PPC JTAG.
Sep 09 01:41:21 <ka6sox> (we currently use a BDM for programming it)
Sep 09 01:41:40 <ep1220> MIPS does not allow to load code into a cache.
Sep 09 01:42:06 <ep1220> You can only load WORDs of Code "on demand" thru JTAG
Sep 09 01:42:20 <ep1220> the FTDI is not good at this.
Sep 09 01:42:46 <ep1220> But likely FLASH prog thur JTAG chain would be faster than with wiggler
Sep 09 01:43:28 <ka6sox> agreed
Sep 09 01:43:57 <ka6sox> okay most people here read the logs so your price has been mentioned and people will start chiming in.
Sep 09 01:43:57 <ep1220> To realy speed-up MIPS  You need a FPGA 
Sep 09 01:43:59 <ka6sox> :)
Sep 09 01:44:43 <ka6sox> our S3 boards can do that..
Sep 09 01:45:28 <ep1220> but also need an adapter PCB to add JTAG header
Sep 09 01:45:50 <ka6sox> yes
Sep 09 01:45:50 <ep1220> the S3 could do 40-60MHz JTAG clock
Sep 09 01:45:58 <ka6sox> yep
Sep 09 01:46:36 <ep1220> i paid 200$ for the S3eval + USB
Sep 09 01:46:45 <ep1220> this is another price range
Sep 09 01:47:25 <ka6sox> ooohyeah.
Sep 09 01:48:09 <ka6sox> I'm looking forward to the S3e but not until december now... :(
Sep 09 01:49:18 <ep1220> the current (smallest) S3 is fast and large enough ...
Sep 09 01:50:05 <ka6sox> the disadvantage with the FPGA is reprogramming it for each arch
Sep 09 01:50:34 <ep1220> I have a solution were I do not need to reprogram
Sep 09 01:50:44 <ka6sox> very nice
Sep 09 01:51:01 <ka6sox> the 50k gate ones are big enough?
Sep 09 01:51:21 <ka6sox> oops..htinking s2
Sep 09 01:53:45 <ka6sox> must sleep now...back in 6hrs...
Sep 09 01:54:06 <ep1220> in phone call now, see You later
Sep 09 01:54:10 <ep1220> good night
Sep 09 01:56:26 <ka6sox> good discussion here...very helpful
Sep 09 02:49:25 <dyoung> Did I miss it all again?
**** ENDING LOGGING AT Fri Sep 09 02:59:56 2005