**** BEGIN LOGGING AT Fri Sep 23 02:59:56 2005 **** BEGIN LOGGING AT Sat Sep 24 00:19:53 2005 Sep 25 06:19:33 anyone with ee knowledge available who could have a look at my jtag controller design? i'm trying to model a tri-state bus, but the simulation tells me that the bus is always high-impedance, no matter what i specify in the simulation Sep 25 06:35:10 <[g2]> vmaster I'm not an ee Sep 25 06:35:17 <[g2]> just a firmware guy Sep 25 06:35:20 <[g2]> hey ep1220 Sep 25 06:35:30 hi [g2] Sep 25 06:37:56 [g2]: http://mmd.ath.cx/top_level.pdf - that's the top-level schematic - do you know if the bi-directional bus is modeled correctly? Sep 25 07:19:06 hmmm, looks like it works using modelsim, but not using the ise simulator... Sep 25 07:22:01 <[g2]> ep1220 how's that hw coming ? Sep 25 07:22:51 [g2] i have the schematic finished. Sep 25 07:23:17 hope to discuss it with ka6sox before i have the PCBs manufactured Sep 25 07:23:48 <[g2]> when will you have proto's ? Sep 25 07:25:08 depends on what we decide to pay Sep 25 07:25:23 standard service is 1 week Sep 25 07:25:30 faster costs more Sep 25 07:25:43 <[g2]> it always does ? Sep 25 07:25:47 <[g2]> it always does ! Sep 25 07:26:23 <[g2]> so is this the full board or one that accepts the dip Sep 25 07:26:35 dip Sep 25 07:26:45 the FTDI is 0.5mm pitch Sep 25 07:27:16 <[g2]> so dip + board + personality adapter + sw = Full JTAG ? Sep 25 07:27:48 dip + board +Sw is full JTAG with ARM 20pin header Sep 25 07:28:12 other pinouts need a personality adapter Sep 25 07:29:23 <[g2]> I'll need the 14 pin special Sep 25 07:30:34 Maybe You can mail me the pinout ? Sep 25 07:31:28 special adapters can be made relative cheaply Sep 25 07:34:01 http://www.arm.com/support/Embedded-ICE%20Adaptor%20Schematic.pdf Sep 25 07:34:12 that's the arm standard 14-pin Sep 25 07:43:27 <[g2]> ep1220 absolutely I can e-mail you the pinout :) Sep 25 07:43:59 pls do so Sep 25 07:44:23 <[g2]> vmaster yes but 2 pins are used for rx/tx on serial Sep 25 07:44:29 ah, ok Sep 25 07:44:38 <[g2]> ep1220 in the next couple days I will Sep 25 07:44:46 k Sep 25 07:44:54 <[g2]> I'll have to check tomorrow (Monday) which pins Sep 26 08:25:24 anyone used ocd commander before? Sep 26 08:28:18 sure Sep 26 08:39:52 vmaster: i assume it only supports wiggler compatible dongles right? Sep 26 08:40:02 all macraigor dongles Sep 26 08:40:09 wiggler, raven, mpdemon, usbdemon Sep 26 08:41:26 ahh Sep 26 08:41:42 so what exactly does ocd commnader do? Sep 26 08:41:48 * prpplague isn't familiar with it Sep 26 08:41:57 it's a assembly-level debugger Sep 26 08:42:06 you can download code to your target's ram Sep 26 08:42:08 and execute Sep 26 08:42:13 stop any time you like Sep 26 08:42:13 ahh Sep 26 08:42:15 single-step Sep 26 08:42:17 examine memory Sep 26 08:43:20 vmaster: i can everything execpt single step with hacked apps now Sep 26 08:43:44 sounds like a nice freebee tool though Sep 26 08:45:27 it has some major drawbacks Sep 26 08:45:34 no flash writing support Sep 26 08:45:42 no wiggler support under linux Sep 26 08:45:57 (almost) no cp15 access (for mmu targets) Sep 26 08:46:43 never got the raven to work under linux Sep 26 08:47:00 only with windows Sep 26 08:48:34 but sure, it's free, and if you don't need anything it misses, it's fine Sep 26 09:12:12 vmaster: not much use to me then Sep 26 09:13:26 why? linux support? Sep 26 09:13:32 yea Sep 26 09:13:45 * prpplague has been m$ free since july of 1997 Sep 26 09:14:01 * [g2] since 2003 Sep 26 09:14:13 it it was that easy... Sep 26 09:14:29 <[g2]> I let the kids play on XP Sep 26 09:14:52 the xilinx tools for linux suck so bad, i have to use vmware/w2k again Sep 26 09:16:27 prpplague: what exactly do you want to do? Sep 26 09:17:11 vmaster: with regards to ocd commander, someone just mentioned it, and as i had never heard of it i was just trying to find out Sep 26 09:17:18 ah, ok Sep 26 09:17:22 vmaster: i already have plenty of jtag tools Sep 26 09:17:46 macraigor offers two tools, the ocd commander, and ocd remote Sep 26 09:17:46 vmaster: i have a lauterbauch and several home break devices Sep 26 09:18:02 <[g2]> so what's the best free one ? Sep 26 09:18:56 well thats kind of a hard question Sep 26 09:19:20 <[g2]> if it was an easy question I'd know the answer :) Sep 26 09:19:54 hehe Sep 26 09:20:03 [g2]: nother other there right now does it all Sep 26 09:20:20 [g2]: you have to use two or three different ones to do the job Sep 26 09:20:49 <[g2]> ok, flashing and debugging as two classes Sep 26 09:20:56 <[g2]> do we need a third class ? Sep 26 09:22:24 [g2]: flashing i prefer jflash every time because its easy to modify Sep 26 09:22:33 [g2]: but some ppl prefer jtag-tools Sep 26 09:24:21 [g2]: armtool is pretty good for debugging Sep 26 09:24:56 i've hacked armtool to do a code download and use objdump to disassemble and display code Sep 26 09:25:16 only thing i can't do right now with it is single-step code Sep 26 09:26:25 <[g2]> though I've done hardly any debugging in the last couple years Sep 26 09:26:36 <[g2]> the things up on my list are: Sep 26 09:26:48 <[g2]> 1) JTAG debugging Sep 26 09:27:03 <[g2]> 2) JTAG break-in and see where stuff is at Sep 26 09:27:16 <[g2]> 3) maybe the PMU stuff Sep 26 09:28:01 <[g2]> and of course being able to flash and dl/upload program data from memory Sep 26 09:28:02 what do you mean by "break-in"? and what's pmu? Sep 26 09:28:27 <[g2]> back in the day..... Sep 26 09:28:47 <[g2]> the x86 had a debugger with a little red button that generated a NMI Sep 26 09:29:04 <[g2]> you could break-in to a locked up system and see where it was locked Sep 26 09:29:14 <[g2]> we should be able to do the same thing with JTAG Sep 26 09:29:27 that comes for free with debugging Sep 26 09:29:41 yea Sep 26 09:30:01 <[g2]> you don't have to attache to as task or anything ? Sep 26 09:30:15 <[g2]> heh attache Sep 26 09:30:44 no, basically you are just forcing a break point Sep 26 09:31:14 that's the way arm explicitly warns about Sep 26 09:31:51 <[g2]> what "we can't guarentee machine state" ? Sep 26 09:31:58 vmaster: oh? Sep 26 09:32:04 vmaster: wasn't aware of that Sep 26 09:32:21 vmaster: thats the way they implement it in armtool Sep 26 09:32:23 only the status and control register can be safely written while the core is running Sep 26 09:32:42 and if you want to enter debug state, it's a lot easier to just force dbgrq high Sep 26 09:32:48 vmaster: interesting, i'll have to go back and look again Sep 26 09:33:16 <[g2]> vmaster you can go in an change the state from running though right ? Sep 26 09:33:56 yeah, the target is running, you assert dbgrq, the target enters debug, and sets dbgack high Sep 26 09:34:21 * prpplague needs to read more about jtag debugging Sep 26 09:34:33 of course, i'm only talking about arm7 and arm9 targets Sep 26 09:34:37 don't know about others Sep 26 09:34:37 vmaster: my main problem is i can;t figure out how to do single steps Sep 26 09:34:50 prpplague: on what core? Sep 26 09:34:57 arm Sep 26 09:35:02 arm7tdmi Sep 26 09:35:31 you couple the two comparators to form an "inverse breakpoint" that breaks on everything but the current instruction Sep 26 09:37:12 ahh Sep 26 09:37:18 makes sense Sep 26 09:37:36 i'll have to implement another function to deal with that Sep 26 09:37:41 shouldn't be too hard Sep 26 09:42:30 no, just write the appropriate values to the embeddedice registers, and execute a resume Sep 26 09:43:40 vmaster: hehe, yea this is some hacked code, once i have a good idea of how things should work, i plan on re-writing armtool Sep 26 09:47:04 if you want have a look of my openocd code - i'm currently rewriting it, but the 0.3 version available on berlios does everything necessary for arm7, arm720t and arm920t targets Sep 26 09:47:43 *at Sep 26 09:47:46 <[g2]> vmaster does it work with a Raven ? Sep 26 09:48:08 vmaster: oh nice Sep 26 09:48:14 vmaster: url? Sep 26 09:48:19 openocd.berlios.de Sep 26 09:48:48 the code is only available on the project site, follow the link below the berlios image in the nav bar Sep 26 09:49:06 [g2]: is there a way to censor purl? Sep 26 09:49:27 <[g2]> vmaster, dunno. Sep 26 09:49:33 <[g2]> I go to #nslu2 Sep 26 09:50:23 downloading Sep 26 09:50:47 my thesis paper is linked from the blog, if you haven't already seen it Sep 26 09:51:57 yea i downloaded it Sep 26 09:52:05 haven't read all of it yet Sep 26 09:52:46 it documents the 0.3 version, if there's anything left unclear just ask Sep 26 09:53:20 <[g2]> vmaster I'm guessing that code works with a wiggler Sep 26 09:54:23 wiggler and ft2232 Sep 26 09:55:16 actually its a generic bit-bang interface that just requires the ability to toggle the jtag lines Sep 26 09:56:25 and an advanced interface for "smarter" devices like the ft2232 Sep 26 11:37:04 vmaster: hmm ./configure fails with an error about install.sh Sep 26 11:38:26 vmaster: you have a custom install.sh or install-sh you are looking for? Sep 26 11:38:29 heh, that's quite possible - i didn't pay much attention to the autotools stuf yet Sep 26 11:40:09 ah, iirc you have to run autogen.sh first Sep 26 11:41:38 vmaster: yea that did the trick Sep 26 11:41:52 hmm libcli Sep 26 11:41:57 you also have to pay attention to the libraries Sep 26 11:41:59 yep Sep 26 11:42:14 debian has it ;) Sep 26 11:42:30 the ftdi library is pretty nasty Sep 26 11:43:00 it wont work with a "current" libusb, it requires its own version Sep 26 11:43:11 see INSTALL for details Sep 26 11:43:17 gotcha Sep 26 11:44:21 vmaster: btw, do you per chance know, if the ft2232 linux driver supports both ports? Sep 26 11:44:42 vmaster: there a configure option to disable the ftdi stuff as i don't need it Sep 26 11:44:51 prpplague: sorry, not yet Sep 26 11:45:16 you'll have to modify the make files and jtag.c to get rid of it Sep 26 11:45:24 this is just a prototype Sep 26 11:45:30 vmaster: yikes Sep 26 11:45:35 vmaster: hmm Sep 26 11:45:39 heh, i had to get done with my thesis Sep 26 11:45:44 np Sep 26 11:45:58 i'll have to put it on the back burner then Sep 26 11:48:34 bullet: i believe it does Sep 26 11:48:48 but it's a bit complicated Sep 26 11:48:57 complicated? Sep 26 11:49:11 it all depends on what you want to do with the second port Sep 26 11:49:32 well, two rs232 ports, actually Sep 26 11:49:52 ah, you just want two serial ports? nothing else? Sep 26 11:50:04 no mpsse? Sep 26 11:50:08 well, rs232/rs485 actually, but yes. nothing else Sep 26 11:50:16 works just fine Sep 26 11:50:21 great Sep 26 11:50:30 the ftdi_sio registers ttyUSBn and ttyUSBn+1 Sep 26 11:50:43 nice. very nice. Sep 26 11:51:22 it's getting complicated when you want to use mpsse on channel A, and uart on channel B Sep 26 11:52:26 on the jtag bord you showed me last week, i think you had one rs232 too, right? Sep 26 11:53:05 yes Sep 26 11:53:26 that would be nice for an "integrated" embedded debug solution Sep 26 11:53:48 yeah Sep 26 11:53:50 jtag does the debugging, rs232 for the console Sep 26 12:26:26 <[g2]> lennert welcome Sep 26 12:26:30 hmm, busy in here Sep 26 12:26:33 thanks :) Sep 26 12:27:03 <[g2]> lennert vmaster just finished up his degree with is paper on JTAG Sep 26 12:27:15 ok Sep 26 12:27:21 <[g2]> ep1220 is building a FTDI based adapter Sep 26 12:27:23 how can you write a paper on jtag? Sep 26 12:27:39 [g2]: i think the spartan board would do but the serial is slightly slow Sep 26 12:28:08 <[g2]> lennert the FPGA stuff has been mired for 8-9 months Sep 26 12:28:24 <[g2]> mire as stuck in the mud Sep 26 12:28:39 yeah Sep 26 12:28:55 <[g2]> the S3E platform came out after several of us got the S3 Sep 26 12:28:59 i wrote a jtag thing for the spartan3 board a while ago when i was on holiday Sep 26 12:29:10 <[g2]> heh Sep 26 12:29:12 i think last christmas and i brought my laptop and had nothing to do Sep 26 12:29:20 lennert: that's why his wife thinks he's mad :-D Sep 26 12:29:22 i bought a copy of the jtag specs Sep 26 12:29:33 s/he's/you are/ Sep 26 12:29:33 :D Sep 26 12:29:44 dwery: that's one of the reasons, yes :) Sep 26 12:29:57 lennert: I don't want to know the others :-D Sep 26 12:30:13 <[g2]> So I'd like to have a high-speed JTAG for the Xscale Sep 26 12:30:15 i made a program that just displays the state of the four pushbuttons and the eight slide switches Sep 26 12:30:31 <[g2]> and others stuff too but Xscale is a great start Sep 26 12:30:54 I suppose opencores has already been harvested for code, isn't it? Sep 26 12:30:55 [g2]: so, do you want flash programming or in-circuit debugging? Sep 26 12:31:00 <[g2]> right we can use the S3 and just download over serial Sep 26 12:31:12 <[g2]> lennert long term-both Sep 26 12:31:17 usually what people want to speed up is flash programming Sep 26 12:31:31 [g2]: what's your first priority? Sep 26 12:31:57 <[g2]> actually, I'd like to marry ep1220's knowledge of loading the mini-I cache with high-speed Sep 26 12:32:08 <[g2]> where you dl directly into the onboard I cache Sep 26 12:32:37 <[g2]> so we could dl a 32K bootloader and then let it go and wake up in APEX Sep 26 12:32:49 mini i-cache is 2k iirc Sep 26 12:33:03 <[g2]> yes but you can dl to the main I-cache too Sep 26 12:33:25 i read the relevant datasheets a while ago.. Sep 26 12:33:30 can't remember too well though Sep 26 12:33:35 intel has an application note for it iirc Sep 26 12:33:56 <[g2]> they've got one for flash programming Sep 26 12:34:14 flash programming is easier Sep 26 12:34:20 <[g2]> ep1220 told us the page in the dev manual for the JTAG LDIC code Sep 26 12:34:31 <[g2]> let me look it up in the log Sep 26 12:34:44 you need to actually write that code too, though :) Sep 26 12:35:32 someone with an abatron should just dump the i-cache and tell us what it says ;) Sep 26 12:35:39 whoops, was the mic on when i said that? Sep 26 12:36:30 <[g2]> ep1220 already done it with the FTDI Sep 26 12:36:54 a full gdb stub? Sep 26 12:37:07 <[g2]> no loading with LDIC Sep 26 12:37:13 oh Sep 26 12:37:18 yeah, i believe that that's possible Sep 26 12:39:06 you have to write a gdb stub though Sep 26 12:39:08 or a part of it Sep 26 12:39:22 i think you could actually do that with the spartan3 board Sep 26 12:39:47 <[g2]> well with the S3E you could do it over 100Mb ethernet Sep 26 12:39:56 just hook it up to the slug Sep 26 12:40:01 [g2]: yeah, that would be even better Sep 26 12:40:08 [g2]: but you have to implement tcp or something ;) Sep 26 12:40:26 <[g2]> UDP and checksums would work Sep 26 12:40:28 [g2]: ethernet is faster, but a bit of a pain since it's not reliable Sep 26 12:40:34 [g2]: yeah, and making sure that you didn't miss any frames Sep 26 12:40:35 lennert: you could do it at a lover level of the ISO/OSI stack Sep 26 12:40:46 [g2]: some dumb retransmit algorithm like tftp Sep 26 12:40:49 <[g2]> ethernet frames Sep 26 12:40:55 [g2]: gotcha! Sep 26 12:41:07 either that or implement a tiny arm processor in the fpga and run linux' tcp/ip stack on it ;) Sep 26 12:41:23 lennert: that's the other reason, isn't it? :-D Sep 26 12:41:30 <[g2]> well the processors do have soft cores Sep 26 12:41:36 yeah, microblaze Sep 26 12:41:38 <[g2]> but it's more of an IP issue Sep 26 12:41:41 yeah Sep 26 12:41:49 i don't like xilinx' ip license Sep 26 12:41:53 would rather just write everything myself Sep 26 12:41:54 <[g2]> I want something Open and fairly cheap Sep 26 12:41:56 yeah Sep 26 12:42:04 IP = 'all your ass are belong to us' Sep 26 12:42:11 <[g2]> lol Sep 26 12:43:23 <[g2]> So I think we need to just discuss that layers of the architecture and get some stuff in place Sep 26 12:43:31 yeah Sep 26 12:43:46 <[g2]> there are plenty of people to work on stuff, it's just the vhdl has been the road block for most of us Sep 26 12:43:50 oh Sep 26 12:43:55 <[g2]> I think vmaster is the exception Sep 26 12:43:59 you guys have a mailing list? Sep 26 12:44:05 [g2]: vmaster = verilog/vhdl master ;) Sep 26 12:44:08 <[g2]> and he just showed up a little while ago Sep 26 12:44:19 <[g2]> maybe ? Sep 26 12:44:32 <[g2]> we should setup a ml Sep 26 12:44:51 * dwery suggest using google mailing lists, not yahoo's :) Sep 26 12:45:01 <[g2]> can you wait a couple days ? Sep 26 12:45:12 <[g2]> I'll set one up on giantshoulderinc Sep 26 12:45:21 why not on openjtag.net? Sep 26 12:45:25 <[g2]> it's been on my todo list Sep 26 12:45:49 <[g2]> that's up to ka6sox Sep 26 12:46:28 <[g2]> I don't really care where it's done, just that it gets done and we get rolling Sep 26 12:47:22 yeah Sep 26 12:47:27 i need to think this over Sep 26 12:47:39 i don't even know how the current openjtag codebase does it Sep 26 12:49:03 <[g2]> that's fine, we should start sending idea around on the ml Sep 26 12:49:50 [g2]: what are you currenly using to to parallel-port jtag programming? Sep 26 12:50:37 <[g2]> dwery I've got a parallel port for the Loft/Avila boards it can just reflash Sep 26 12:50:43 <[g2]> so I can test bootloader that way Sep 26 12:51:02 I remember i contributed to jtagtools years ago.. is that software still in use? Sep 26 12:51:03 <[g2]> however, I've just reflashed with dd 99% of the time Sep 26 12:51:31 <[g2]> I think that's what lennert meant... WinCE jtag Sep 26 12:51:43 <[g2]> it's jtag 0.5 Sep 26 12:52:43 yes, that one. http://openwince.sourceforge.net/jtag/ Sep 26 12:52:46 yeah, i meant wince jtag Sep 26 12:53:00 <[g2]> nod all around Sep 26 12:53:15 if you want to make jtag go faster than via the parallel port, you need a way of offloading it Sep 26 12:53:22 yep Sep 26 12:53:34 the most generic interface is 'shift this row of bits into the shift register, and give me the bits that you shifted out' Sep 26 12:53:40 :D Sep 26 12:54:05 and some special primitives for manipulating the TMS input Sep 26 12:54:24 i suspect this is something that openwince jtag has already solved Sep 26 12:54:30 in which case we can just code against their API Sep 26 12:55:46 <[g2]> well my thinking is that if we load code into the I cache and start it up, then we can configure memory and relocate to memory and have a bootloader and serial running Sep 26 12:56:19 <[g2]> then we could XYZmodem over an image and flash it from memory Sep 26 12:56:20 that'll work Sep 26 12:56:29 that would also work Sep 26 12:56:43 but then you don't need the additional hardware ;) Sep 26 12:56:51 you can just load the icache via the parallel port jtag adapter Sep 26 12:56:53 <[g2]> or be able to stop the processor and reload the I cache Sep 26 12:57:06 and pull in the flash contents via the usb port of the slug Sep 26 12:57:28 [g2]: You could transfer the data thru JTAG as well - a but faster than serial - and needs no drivers :-) Sep 26 12:57:38 s/but/bit/ Sep 26 12:57:51 <[g2]> ep1220 that'd works well to Sep 26 12:57:56 running code from i-cache could cause you a lot of trouble Sep 26 12:57:57 <[g2]> and make use of the hw Sep 26 12:58:11 only code fetches come from the icache, no data fetches Sep 26 12:58:28 i doubt any compiler allows you to live completely without data memory :) Sep 26 12:58:42 vmaster: you have to code it by hand then ;) Sep 26 12:58:50 vmaster: but any assembler does ;-) Sep 26 12:58:53 <[g2]> actually have a program transcode Sep 26 12:59:22 <[g2]> load immediate, load immediate, store xxxx, ..... Sep 26 12:59:25 yeah Sep 26 12:59:36 but i guess you don't want to do anything larger that way Sep 26 12:59:42 [g2]: a friend of mine wrote an ascii-only x86 shell code generator some years back that did exactly that Sep 26 12:59:44 like, you wont have a stack either Sep 26 13:00:10 that icache method is good for a debug handler, but that's about it Sep 26 13:00:41 <[g2]> lennert this has _all_ been done before :) Sep 26 13:00:54 [g2]: i know :) Sep 26 13:00:58 <[g2]> our fortran loader had shared libs back in the 70's Sep 26 13:01:20 you had computers in the 70's? ;) Sep 26 13:01:29 <[g2]> and punch cards ;) Sep 26 13:01:42 <[g2]> with big 'ol line printers Sep 26 13:02:20 <[g2]> and when we dumped the scripts to invoke the compiler batch and found the commands to run them interactively Sep 26 13:02:33 just reading up all the stuff you wrote while i grabbed some food at mc d's... Sep 26 13:02:41 <[g2]> people would think the mainframe crashed Sep 26 13:03:04 <[g2]> because it wasn't servicing the TTYs Sep 26 13:03:10 hehehe Sep 26 13:03:22 <[g2]> ah... the old days Sep 26 13:03:45 ok, vmaster is short for virtual master, which was the only master i could think of when i registered my first mail address ;) Sep 26 13:04:01 well, the only one that was available Sep 26 13:05:39 hehe Sep 26 13:06:26 about off-loading jtag work: Sep 26 13:06:47 i don't think it's necessary to put a complete gdb stub into the fpga Sep 26 13:07:03 you just need a "high-level" jtag interface Sep 26 13:07:33 yeah Sep 26 13:07:50 i think shift_bits() is the highest level interface that still preserves all the functionality Sep 26 13:08:04 latency would kill you, if you just shift bits Sep 26 13:08:08 if to go even higher.. you'll have to tell the fpga which bit positions you are interested in Sep 26 13:08:24 vmaster: well, you shouldn't shift the bits one by one ;) Sep 26 13:08:40 the fpga has to know about which bits you're interested in Sep 26 13:08:54 one example from arm7/arm9 debugging: Sep 26 13:09:11 when accessing system memory, you shift a load/store multiple instruction into the core Sep 26 13:09:24 and have it executed at system speed Sep 26 13:09:37 you then have to poll the core until it reentered debug state Sep 26 13:10:25 yes Sep 26 13:10:42 if you want high speed, you have to off-load that decision to the fpga Sep 26 13:11:11 like: execute the following jtag commands until bit #x is high Sep 26 13:11:28 yeah, but you want to keep the interface general enough to also allow for other stuff Sep 26 13:11:51 you can build a protocol to interface with the fpga that works very well for debugging, but it won't work for flash programming then Sep 26 13:11:58 or i just didn't think it through very well yet Sep 26 13:12:35 imho, there's nothing a higher-level interface couldn't do Sep 26 13:13:10 <[g2]> I think we'd want to setup different commands based on lenghts Sep 26 13:13:20 hmm? Sep 26 13:13:29 vmaster: do you have your idea written up somewhere? Sep 26 13:13:37 <[g2]> for the IXP4xx the man shift chain is 498 bits iirc Sep 26 13:13:54 <[g2]> s/man/main/ Sep 26 13:14:15 <[g2]> however, the LDIC is like 40 bits iirc Sep 26 13:14:30 <[g2]> and there are lot of variants Sep 26 13:14:57 lennert: openocd.berlios.de - i've documented the current state of my jtag interface there, but it still lacks the "loop" stuff Sep 26 13:16:02 i'll have a look, thanks Sep 26 13:16:43 the looping would probably resemble STAPL Sep 26 13:22:49 <[g2]> hey ka6sox-office lennert wants to setup a ml for openjtag Sep 26 13:23:23 ya..I'm looking at a yahoo one...easier for me to maintain :) Sep 26 13:24:15 <[g2]> ka6sox-office I'd like to setup a ml on a slug/loft at giantshoulderinc Sep 26 13:24:58 <[g2]> it's actually something I'd like to have turnkey for the Loft Sep 26 13:25:14 <[g2]> possibly with a web front-end Sep 26 13:25:58 <[g2]> and then have the archives searchable and web browseable Sep 26 13:26:07 <[g2]> and no adds :) Sep 26 13:26:28 <[g2]> well except for the "Loft" ads :) Sep 26 13:26:28 ya Sep 26 13:34:37 vmaster: there's no docs for your idea yet apart from the api description, is that right? Sep 26 13:35:41 not for the "new" version Sep 26 13:35:53 my thesis documents my original efforts Sep 26 13:36:25 okay Sep 26 13:36:28 ah, and of course the api documents working code Sep 26 13:36:56 the looping is rather simple Sep 26 13:37:27 instead of the single queue that i'm using right now, there would be multiple queues, access by a handle, or whatever Sep 26 13:39:01 an additional command would say: execute queue (n) until the checks match Sep 26 13:39:06 (or a timeout occurs) Sep 26 13:41:06 groups.yahoo.com/group/openjtag is open for business Sep 26 13:47:18 <[g2]> document not found Sep 26 13:48:15 works fine for me Sep 26 13:49:23 <[g2]> not on the US yet Sep 26 13:49:46 [g2]: europe gets stuff first Sep 26 13:49:49 [g2]: ;) Sep 26 13:49:59 <[g2]> ah... finally Sep 26 13:52:35 this is supposed to be a joke, right? Sep 26 13:52:36 Message Format Sep 26 13:52:37 Convert to HTML - Convert plain-text messages sent to me to HTML. Sep 26 13:52:49 nope Sep 26 13:53:01 those people live in an html world like we live in a text world Sep 27 12:07:11 das bee Sep 27 12:07:17 beewoolie-afk: whats cookin? Sep 27 12:07:43 prpplague: I'm over on debonaras. Been working on a kernel package for the slug. Sep 27 12:08:44 debonaras? Sep 27 12:09:44 it's #debonaras Sep 27 12:10:13 Debian On NAS And Routers And Stuff Sep 27 12:10:44 Sorry, right. Sep 27 12:11:10 Debian On A ??? Sep 27 12:11:51 ahh Sep 27 12:12:28 ok... DEBian On NAS And Routers And Stuff Sep 27 12:12:50 lovely Sep 27 12:13:05 and that is darn hard to type Sep 27 12:13:08 Right. Brain skip. Network Attached Storage. Sep 27 12:13:09 <[g2]> beewoolie-afk, ep1220 is cranking on his usb JTAG Sep 27 12:13:15 Nice. Sep 27 12:13:18 <[g2]> vmaster is working on something too Sep 27 12:13:32 It's on my shopping list, but I've been doing too many other things. Sep 27 12:13:50 <[g2]> I told lennert I'd pay him for a FPGA dev board if he did the vhdl code and he decided to take me up on it Sep 27 12:14:01 Awesome! Sep 27 12:14:10 <[g2]> i hope a loft is on you list too :) Sep 27 12:14:17 that means we could get a full-speed solution. At least, 8MHz. Sep 27 12:14:32 Would this be the spartan? Sep 27 12:14:38 <[g2]> yes Sep 27 12:14:46 <[g2]> I think he's got a S3 board Sep 27 12:14:55 it's on mine... I might have to raid my son's allowance, but it is on my list! Sep 27 12:15:14 <[g2]> The S3E has 32MB DDR 4MB flash and 10/100 Ethernet Sep 27 12:16:19 how much is a S3E board? Sep 27 12:16:38 <[g2]> $149 Sep 27 12:16:50 wow Sep 27 12:17:26 <[g2]> and vmaster dabbles in vdhl/verilog and wrote his thesis? on JTAG related matters Sep 27 12:18:07 more on arm debugging than on jtag, but of course that came with it Sep 27 12:22:32 <[g2]> thx for clarifying that Sep 27 12:23:31 <[g2]> so beewoolie-afk ever play with ide devices ? Sep 27 12:51:53 ka6sox-office: ping Sep 27 13:27:24 ep1220, pong Sep 27 13:27:57 I eliminated the 2 SOT23 Sep 27 13:28:12 oh? Sep 27 13:28:24 not adding the feature or come up with a different solution? Sep 27 13:28:45 I replaced the AMp with its Dual version, which is availlable in SO8 Sep 27 13:29:07 cool Sep 27 13:29:07 I found a DIP8 LDO regualtor whic does 1,2 to 3.6 Sep 27 13:29:17 sweet! Sep 27 13:29:24 this makes it much easier Sep 27 13:29:33 however it is abit picky on CSR Sep 27 13:29:44 So i also left the SOT23-5 regualtor Sep 27 13:29:50 good plan :) Sep 27 13:30:06 It nicely fits inside the DIP8 layout ;-) Sep 27 13:30:25 Then I made a bill of materials anc checked prices. Sep 27 13:30:30 isn't that nice :) Sep 27 13:30:40 re: the layout Sep 27 13:30:58 cost of parts is 52USD. Sep 27 13:31:16 not bad. Sep 27 13:31:58 If one does not want the regulator and the op amp it is approx4 USD less Sep 27 13:32:17 Layout is close to finished Sep 27 13:32:23 tomorrow i double-check the parts packaging Sep 27 13:32:32 and than add the ground plane Sep 27 13:32:36 then Sep 27 13:57:29 [g2]: IDE? yes. **** ENDING LOGGING AT Tue Sep 27 15:07:06 2005 **** BEGIN LOGGING AT Fri Sep 30 02:36:11 2005 **** ENDING LOGGING AT Fri Sep 30 02:59:57 2005