**** BEGIN LOGGING AT Sat Mar 11 10:59:56 2006
Mar 11 12:06:50 <AchiestDragon> NAiL:  whats the board you trying to figure out the connections for  
Mar 11 12:09:13 <AchiestDragon> and whats the pinout you have worked out so far 
Mar 11 12:23:35 <NAiL> AchiestDragon: It's a Synology DS101, an IXP420BB
Mar 11 12:24:03 <NAiL> Pin1 is vcc, pin6 is gnd and 2,3,4,5 & 7 are inputs
Mar 11 12:24:54 <NAiL> There's 8 pins total
Mar 11 12:25:09 <NAiL> pin 8 appears to be an output
Mar 11 12:26:32 <AchiestDragon> k
Mar 11 12:40:55 <NAiL> That's as far as I've come. I've got no idea how to identify the inputs.
Mar 11 12:41:22 <AchiestDragon> ok 
Mar 11 12:43:30 <AchiestDragon> well looking at a few the  logical use would be  1 vcc , 2 ? , 3 tck , 4 trst, 5 tdi,6,gnd , 7 tdo and 8 tms as that is just one side of a 16 pin arm jtag std  with vcc and gnd run to normaly n/c pins 
Mar 11 12:43:58 <AchiestDragon> guess that would mae it easy for them to use standard kit with verry little mods to the cable 
Mar 11 12:44:41 <AchiestDragon> but if 8 is an output then that is likely to be tdo 
Mar 11 12:44:58 <AchiestDragon> so 7 and 8 could be crossed  
Mar 11 12:46:48 <AchiestDragon> depends on how well they randomized the connection , if done for savingpcb space then the above would be a good arangmet to use , bu if done to try and keep it form being used then it could be a pita
Mar 11 12:47:10 <NAiL> yeah
Mar 11 12:48:04 <NAiL> How large is the risk for destroying something if I just try & fail? :)
Mar 11 12:48:05 <AchiestDragon> http://www.pls-mc.com/files/uad_jtag_extender.pdf  look at the pinout for the 16 pin type 
Mar 11 12:48:28 <AchiestDragon> the pin 1 to 15 side 
Mar 11 12:49:07 <AchiestDragon> theres 2 n/c s that would tie in with the gnd and vcc pins on that connector that you are looking at 
Mar 11 12:50:00 <NAiL> ah
Mar 11 12:50:14 <NAiL> so if the TMS and TDO is swapped then
Mar 11 12:50:21 * NAiL hopes :)
Mar 11 12:51:22 <AchiestDragon> well  do not connect what you think is the output , but put a scope on it , try feeding it a clock and seeing if it gives a responce 
Mar 11 12:51:40 <NAiL> Heh, yeah. If I only had a scope ;)
Mar 11 12:51:55 <NAiL> I wonder if I can get access to one
Mar 11 12:52:40 <AchiestDragon> if you wire inputs to inputs then you will be ok , but if you wire outputs to outputs you can get probelms unless there open collector 
Mar 11 12:53:30 * NAiL goes "huh?"
Mar 11 12:53:38 <NAiL> I'm no EE. What's an open collector?
Mar 11 12:53:45 <AchiestDragon> if you use the wiggler design i posted you should be ok
Mar 11 12:53:57 <NAiL> I'm using a JTAG-cable from Olimex
Mar 11 12:56:17 <AchiestDragon> as tdo is the only output you should have from the board then find that first
Mar 11 12:56:30 <AchiestDragon> looks like pin 8 from what you say 
Mar 11 12:56:57 <AchiestDragon> so what you need to do is find  tms tdi and tck 
Mar 11 12:58:31 <AchiestDragon> the easy way is tms is used to enble jtag , and tck is used as a clock   so with tdi not beeing used is connect eac posible combination for  tck and tms , feed it a clock untill you start getting data out 
Mar 11 12:58:54 <AchiestDragon> then you should have tdo, tms and tck sorted
Mar 11 12:59:43 <AchiestDragon> you may also descover trst and srst  as the system should reset when thay go low 
Mar 11 13:00:09 <AchiestDragon> all beeing well then your left with just the tdi pin 
Mar 11 13:01:00 <AchiestDragon> the only damage you may manage is to the software on the unit your traying to figure out the connection 
Mar 11 13:01:22 <AchiestDragon> if it has a cpld in the chain that may be a problem 
Mar 11 13:01:31 <NAiL> hmmmmmmm
Mar 11 13:01:58 <NAiL> There is a cpld on the board, but I don't think that it is connected to the JTAG stuff
Mar 11 13:02:33 <AchiestDragon> but if you have 2 boards you may be able to copy back the any settings from one to the other once you have sorted out the pinouts  
Mar 11 13:02:52 <NAiL> I have a complete image of the flash handy
Mar 11 13:03:35 <AchiestDragon> its not just the flash  the  cpld is flash programed by jtag also
Mar 11 13:03:51 <NAiL> aah
Mar 11 13:04:59 <NAiL> hmm
Mar 11 13:05:18 <NAiL> would it be possible to get the contents of the cpld with jtag?
Mar 11 13:05:45 <NAiL> I've got another board that I could use to read all the stuff if mine fails
Mar 11 13:05:50 <AchiestDragon> the other usual way to figue out the pinout is you need a faulty board  so that you can remove the bga  chip and phisicaly meter out the pinouts 
Mar 11 13:06:20 <NAiL> yeah, unfortunately, I don't have a faulty board. Wish I could afford making this one faulty :-P
Mar 11 13:07:01 <AchiestDragon> and if you take the time you can phisicaly meter out the whole board and produce a set of schematics for it also 
Mar 11 13:08:46 <AchiestDragon> it may be a good idea to post on the slug mailing for someone that has a faulty board , and see if anyone there has already tryed it 
Mar 11 13:10:37 <NAiL> Yeah
Mar 11 13:10:49 <dwery> NAiL: how's going on with jtag?
Mar 11 13:10:55 <NAiL> not very far yet, no.
Mar 11 13:11:05 <AchiestDragon> its easy to remove the bga , but you also endup removing most of the other components at the same time  , its puting it back together thats the hard bit
Mar 11 13:11:10 <dwery> tried to get the pinout of the cpld?
Mar 11 13:11:22 <NAiL> I've sent a mail to synology though. The guy there might actually give me the pinout of the JTAG port if he has it :)
Mar 11 13:11:41 <NAiL> dwery: no. How? :)
Mar 11 13:11:52 <AchiestDragon> thats a tought , is the cpld  bga also ?
Mar 11 13:11:55 <dwery> use the force, luke... ehm.. use google, NAiL :-D
Mar 11 13:12:08 <dwery> if it is connected to jtag, you're all set
Mar 11 13:15:17 <NAiL> It doesn't appear to be connected to the cpld
Mar 11 13:18:18 <NAiL> http://www.nslu2-linux.org/gallery/DS101-PCBs/ds101_front_big?full=1
Mar 11 13:18:48 <NAiL> and
Mar 11 13:18:49 <NAiL> http://www.nslu2-linux.org/gallery/DS101-PCBs/ds101_rear_big?full=1
Mar 11 13:19:05 <dwery> i'd check anyway...
Mar 11 13:19:11 <dwery> you have a multimeter, right?
Mar 11 13:19:19 <NAiL> yup
Mar 11 13:19:41 <dwery> what's the cpld part number?
Mar 11 13:21:38 <NAiL> LC4032V
Mar 11 13:24:01 <AchiestDragon> looking at the routing of pin 8  that looks more like a SRSTn as it goes to a number of points on the pcb 
Mar 11 13:31:28 <AchiestDragon> do you have a meter there  
Mar 11 13:31:32 <NAiL> yup
Mar 11 13:32:59 <AchiestDragon> k meter pins  2,3,4,5,7 and 8  and see if there is any connection to the lc4032v
Mar 11 13:33:03 <dwery> AchiestDragon: IEEE 1149.1 is jtag, right?
Mar 11 13:34:43 <AchiestDragon> Boundary-Scan (IEEE 1149.1) useing jtag yes 
Mar 11 13:35:07 <dwery> ok, then the cpld has jtag
Mar 11 13:35:19 <dwery> http://www.latticesemi.com/lit/docs/datasheets/cpld/ispm4k.pdf?jsessionid=ba3023300ce0y$04$28$
Mar 11 13:35:22 <dwery> page 42
Mar 11 13:35:58 <dwery> pinout on page 45
Mar 11 13:36:23 <AchiestDragon> but that may be via cn1 and not on the same jtag as the cpu 
Mar 11 13:36:48 <dwery> right
Mar 11 13:36:54 <dwery> did not checked the image :)
Mar 11 13:37:19 <dwery> So we should have the cpld, the flash and the cpu all of them with jtag
Mar 11 13:38:10 <NAiL> ok, pins 7 and 8 doesn't show any connection to the cpld
Mar 11 13:38:33 <AchiestDragon> do the others 
Mar 11 13:38:49 <NAiL> working on it ;)
Mar 11 13:41:22 <NAiL> nope
Mar 11 13:42:26 <AchiestDragon> ok
Mar 11 13:43:38 <AchiestDragon> just at the corner of te cpu theres a rsistor pack  under the text R158 
Mar 11 13:44:14 <AchiestDragon> meter out the jtag conector to the top 4 pins of that 
Mar 11 13:44:43 <AchiestDragon> there going to be     tms,tdi,tdo and tck 
Mar 11 13:45:08 <AchiestDragon> so just the order to sort then 
Mar 11 13:45:40 <NAiL> 5 is tdi then
Mar 11 13:46:04 <NAiL> 3 is tdo
Mar 11 13:46:19 <NAiL> 7 is tck
Mar 11 13:46:43 <dwery> AchiestDragon: how did you figured that? :)
Mar 11 13:46:55 <NAiL> but I can't find which one is tms
Mar 11 13:47:03 <AchiestDragon> i still need to sort the order
Mar 11 13:47:07 <NAiL> oh
Mar 11 13:47:49 <AchiestDragon> is there a pinout of the cpu anyware , i know its bga but need to see where the pins are on the thing 
Mar 11 13:47:52 <NAiL> well, I assumed... From left to right, the pins on R158 are connected to jtag ?, 5, 3, 7
Mar 11 13:48:21 * NAiL looks. I think there's a link on the nslu2-linux website somewhere
Mar 11 13:49:22 <NAiL> checking which one has the pinout
Mar 11 13:50:25 <NAiL> http://www.intel.com/design/network/datashts/252479.htm 
Mar 11 13:50:28 <NAiL> the pdf there
Mar 11 13:50:39 <NAiL> pages 50 and out
Mar 11 13:50:47 <AchiestDragon> ty
Mar 11 13:52:29 <AchiestDragon> ok
Mar 11 13:56:12 <NAiL> Figure out anything?
Mar 11 14:03:09 <AchiestDragon> hmm
Mar 11 14:09:56 <AchiestDragon> 1 vcc  ,  2 ? , 3 tms , 4 tdo , 5 tdi , 6 ? , 7 tck  ,
Mar 11 14:10:48 <NAiL> 1 VCC, 2 ?, 3 TMS, 4 TDO, 5 TDI, 6 GND, 7 TCK, 8 ?
Mar 11 14:11:17 <AchiestDragon> yes
Mar 11 14:11:35 <NAiL> cool :)
Mar 11 14:12:12 <AchiestDragon> so  SRSTn on 8 and TRSTn on 2 
Mar 11 14:12:24 <NAiL> Thanks a bunch!
Mar 11 14:14:40 <NAiL> All I need now is to make a converter for my current cable ;)
Mar 11 14:25:03 <dwery> congrats!
Mar 11 14:25:32 <NAiL> Yeah. I don't think I have enough stuff to make a converter handy right here though
Mar 11 14:25:46 <NAiL> so I guess I'll have to wait until tomorrow with making that
Mar 11 14:28:25 <NAiL> But it's great progress :-D
Mar 11 14:30:56 <AchiestDragon> i find the connectors like thay use in pc cases for connecting the switches and leds good for making adaptors , you can if you lift the little tabs remove the contact and place them into diferent holes  
Mar 11 14:31:43 <NAiL> yeah, I've used all I had of those ;)
Mar 11 14:35:09 <AchiestDragon> same here , need to buy some now  but dont fancy having to by the crimp tool for them 
Mar 11 17:12:56 <prpplague> ~seen beewoolie
Mar 11 17:12:59 <purl> beewoolie <n=beewooli@206.124.142.26> was last seen on IRC in channel #openjtag, 28d 17h 22m 4s ago, saying: 'I thought they were going SA-SCSI so there'd only be a dozen or so pins.'.
Mar 11 17:13:02 <prpplague> ~seen beewoolie-afk
Mar 11 17:13:04 <purl> beewoolie-afk <n=beewooli@206.124.142.26> was last seen on IRC in channel #openjtag, 2d 22h 12m 48s ago, saying: 'just returned from skiing.'.
**** ENDING LOGGING AT Sun Mar 12 10:59:56 2006