**** BEGIN LOGGING AT Fri Sep 15 02:59:57 2006 Sep 15 13:06:44 vmaster: morning Sep 15 13:07:48 hey prpplague Sep 15 13:08:17 vmaster: you said you used your dlpdesign module without any buffers correct? Sep 15 13:09:24 yeah Sep 15 13:09:55 just a 3v3 regulator from the 5v usb, but vref would probably have been an even better choice Sep 15 13:19:18 vmaster: yea, just let the voltage from the target board provide the voltage Sep 15 13:19:36 vmaster: you got a schematic done up? Sep 15 13:50:34 it's the one in my thesis, on the openocd page (openocd.berlios.de/web/) Sep 15 13:50:37 USBJTAG-1 Sep 15 13:54:37 vmaster: ok thanks Sep 15 13:58:50 vmaster: you said you had to make some changes to the eprom config using that schematic? Sep 15 14:09:21 yeah, the default is to drive with something like 5ma, but you can enable a high-drive mode with 10 or 15ma Sep 15 14:10:14 vmaster: ahh ok Sep 15 14:12:57 vmaster: not gonna hurt to try it with the current settings? Sep 15 14:23:01 no, not at all Sep 15 16:14:40 vmaster: ping Sep 15 16:23:09 prpplague: pong Sep 15 16:24:38 vmaster: on the m5960 schematic Sep 15 16:24:54 vmaster: i removed r9 and 9 Sep 15 16:24:58 and c9 Sep 15 16:25:06 vmaster: works with no errors now Sep 15 16:25:14 vmaster: getting about 50kbps Sep 15 16:25:31 to flash? that's probably as good as it gets with the ft2232 Sep 15 16:26:07 yea Sep 15 16:26:18 mhh, what were r9 and c9 supposed to do? Sep 15 16:26:27 vmaster: jtag_speed set to 1 seems the best Sep 15 16:26:51 vmaster: i spoke to our ee, according to him it was for use with flexible cables, per ieee standards Sep 15 16:27:19 vmaster: but after showing him several other schematics we decided that was cause the tdo to bleed off incorrectly Sep 15 16:27:35 heh, guess you should tell your cable to read the ieee standards then Sep 15 16:27:41 yea Sep 15 16:28:06 doing some speed tests now Sep 15 16:28:22 vmaster: so i can start openocd with a script and exit correct? Sep 15 16:28:26 yeah Sep 15 16:28:45 lovely Sep 15 16:29:08 vmaster: ever tried running multi copies of openocd on one pc? Sep 15 16:29:09 target_script binds a script to a particular event Sep 15 16:29:23 prpplague: yeah, it works, but the USB controller might become a bottleneck Sep 15 16:29:37 latency is critical, not sure how multiple devices are going to behave Sep 15 16:29:43 vmaster: yea, we got a pc with 4 seperate controllers Sep 15 16:29:49 ah, ok Sep 15 16:30:08 currently, the only event is "reset", which would better be called "init" Sep 15 16:30:26 it's delivered after the target entered debug state in case of "reset_init" or "run_and_init" Sep 15 16:31:02 if the s3c behaves good in reset (most arm9 do), you can use "reset_init" to halt the target right at the reset vector Sep 15 16:31:09 and execute the script Sep 15 16:31:19 vmaster: yea, seems so Sep 15 16:31:20 as the last command in the script issue a shutdown Sep 15 16:31:37 wait_halt allows you to pause script execution until debug was actually reached Sep 15 16:33:10 ahh cool deal Sep 15 16:33:12 thats perfect Sep 15 16:33:46 vmaster: we'll be able to do some basic tests, then flash the unit and we'll be done Sep 15 16:34:01 yep Sep 15 16:34:20 run a full speed test now Sep 15 16:34:30 well, there's no error handling in the script support so far Sep 15 16:34:32 the flash erase doesn't seem any faster, but the flash process does Sep 15 16:34:48 flash erase time is mostly dictated by the device Sep 15 16:34:53 yea Sep 15 16:34:57 i.e. the openocd is polling faster than the device erases anyway Sep 15 16:35:34 my guess is that it will take 90 seconds to do 4mb Sep 15 16:35:47 94 seconds Sep 15 16:36:20 vmaster: the dcc downloads process, that do any type of error checking? Sep 15 16:36:32 none at all Sep 15 16:36:37 hmm Sep 15 16:36:40 it just pretends that the target is always faster than the jtag Sep 15 16:36:44 * prpplague wonders what the probablity of error is Sep 15 16:37:56 a verify stage would be easy to implement - reading is >50kbyte/s Sep 15 16:39:18 yea, thats what i was thinking Sep 15 16:39:53 72 seconds for 16mb flash erase, 94 seconds flash programming, 10 misc Sep 15 16:40:35 ah, the cfi code is not endianess safe yet - you'll definitely run into problems with big endian targets or hosts Sep 15 16:40:50 it's not a lot that's required, but i've had no time yet, and nothing to test with anyway Sep 15 16:41:00 everything else should work with either endianness Sep 15 16:41:44 vmaster: yea, we are little endian Sep 15 16:53:54 vmaster: i do seem to get some verification errors with fast_memory_access Sep 15 16:56:48 i'd have to do some calculations, but maybe 12mhz and 3mhz jtag clock are too close Sep 15 16:57:03 you could try enabling the pll Sep 15 16:57:22 that should be scriptable, too Sep 15 16:58:48 vmaster: yea i'm running with the pll enabled Sep 15 16:59:21 vmaster: i'm not see that big of a difference with the fast memory access anyway Sep 15 17:17:59 yeah, it's only used to upload the DCC code anyway Sep 15 17:18:19 and chunks of less than 128 byte, which is a rare when doing flash writes Sep 15 17:20:06 well, looks good Sep 15 17:20:11 vmaster: thanks for the help Sep 15 17:20:23 vmaster: we will be making this available soon along with the schematic Sep 15 17:20:35 vmaster: we have a line of small dev boards coming out as well Sep 15 17:21:05 vmaster: hhoegl's web page seems defunct Sep 15 17:21:26 vmaster: i made a pdf of just the usbjtag-1 schematic from your thesis Sep 15 18:07:33 muasch|swiss12: d00d Sep 15 18:07:40 muasch|swiss12: whats the story? Sep 15 18:07:49 there are three of you now? Sep 15 18:08:12 prpplague, sorry. i have some problems with one of my wlan-routers :( Sep 15 18:08:37 muasch|swiss12: ok just wanted to make sure it wasn't some sort of bot trying to do a take-over Sep 15 18:09:09 ah no. i'will disconnect from irc the next time i play with my router ;-) Sep 15 19:10:41 vmaster: ping Sep 15 19:12:13 rwhitby: pong Sep 15 19:20:34 vmaster: we have a guy at work who is now modifying openocd to support the processor arch we discussed previously Sep 15 19:20:50 Will you have some time this week to review our changes to make sure we're on the right track? Sep 15 19:21:16 (We expect, lawyers willing, that the changes will be contributed back to openocd) Sep 15 19:22:39 The lawyers should be fine, cause they should be able to understand our GPL commitments (quite apart from our true desire to contribute back, but lawyers never understand that) Sep 15 19:26:30 rwhitby: yeah, sure Sep 15 19:27:03 rwhitby: if questions from his side arise i'm here to answer Sep 15 19:29:29 vmaster: thx Sep 15 19:29:39 will talk on Monday **** ENDING LOGGING AT Sat Sep 16 02:59:56 2006