**** BEGIN LOGGING AT Mon Oct 30 02:59:57 2006
Oct 30 16:21:57 <[g2]> ka6sox ping
Oct 30 16:26:35 <ka6sox> [g2], pong
Oct 30 16:29:28 <[g2]> ka6sox what ever happened with the openjtag adapter ?
Oct 30 16:29:44 <[g2]> the hw thingy
Oct 30 16:30:21 <ka6sox> it morphed to be the Geep
Oct 30 16:30:49 <ka6sox> specifically the geep-b
Oct 30 16:33:04 <[g2]> ok where's the geep-b at ?
Oct 30 16:33:36 <ka6sox> the design is done, its being checked
Oct 30 16:33:47 <ka6sox> then will go out for alpha boards.
Oct 30 16:33:47 <[g2]> are you going to build some ?
Oct 30 16:33:50 <AchiestDragon> http://www.whipy.demon.co.uk
Oct 30 16:33:51 <ka6sox> yes
Oct 30 16:33:55 <AchiestDragon> yes
Oct 30 16:34:05 <[g2]> hey AchiestDragon. Nice to see you
Oct 30 16:35:14 <AchiestDragon> well now i got a new house soted i should be able to get on with it 
Oct 30 16:36:51 <ka6sox> [g2] AchiestDragon's design was what I wanted the OJ adapter to be....
Oct 30 16:40:20 <ka6sox> [g2], I plan on building them here in the states.
Oct 30 16:40:30 <ka6sox> (some of them anyways)
Oct 30 16:42:04 <[g2]> does geep-b have a processor too ? or just and S3 and AVR ?
Oct 30 16:43:27 <AchiestDragon> just the s3 and a avr , but looks like theres room for the minimips softcore cpu  in the s3 
Oct 30 16:44:14 <AchiestDragon> im trying to find out from those doing a gnu arm softcore if it will fit in the s3 
Oct 30 16:44:47 <ka6sox> [g2] the shematics are available on www.whipy.demon.co.uk
Oct 30 16:45:15 <[g2]> ka6sox that's what I was looking at, but I didn't notice a processor
Oct 30 16:45:16 <AchiestDragon> if not i may be able to come up with a cpu that will emulate the arm cpu instruction set 
Oct 30 16:45:23 <ka6sox> AVR
Oct 30 16:45:41 <ka6sox> just enough to be able to bootstrap
Oct 30 16:46:30 <ka6sox> okay back to work here... AchiestDragon knows all the details.
Oct 30 16:46:51 <ka6sox> cya'all later.
Oct 30 16:47:15 <vmaster> ARM killed the narm project
Oct 30 16:47:21 <vmaster> or whatever that was called
Oct 30 16:50:21 <[g2]> vmaster on a different subject, the LPC2103
Oct 30 16:50:53 <[g2]> if I apply power and JTAG signals I can probably just JTAG into the onboard flash ?
Oct 30 16:51:14 <AchiestDragon> the avr is mainly used for config and bootstrap , but after that you could program it for other uses , and beeing an fpga it can be configured eather as a state machine or a configure the fpga to have a soft cpu
Oct 30 16:51:39 <vmaster> [g2]: power + oscillator, yeah
Oct 30 16:51:50 <AchiestDragon> and theres quite a few softcore cpus like the t80 and others that will fit in the fpga no problem
Oct 30 16:51:59 <[g2]> vmaster I think there's an ocillator on the board
Oct 30 16:52:11 <vmaster> [g2]: you also have to pull rtck (either up or down)
Oct 30 16:52:11 <AchiestDragon> getting a 16 bit cpu thats linux capable to fit is a bit harder 
Oct 30 16:53:19 <[g2]> vmaster I've got this board http://www.k9spud.com/arm/lpc2103/
Oct 30 16:54:52 <AchiestDragon> shame about the nnARM 
Oct 30 16:55:23 <prpplague> there are plenty of nix style OS's that will run on 8/16 bit platforms but you generally don't see linux in those areas
Oct 30 16:55:43 <AchiestDragon> true 
Oct 30 16:56:06 * prpplague has had uzi running on z80 devices
Oct 30 16:56:41 <AchiestDragon> remebers cp/m and mp/m  on the z80 
Oct 30 16:56:59 <prpplague> http://uzix.sourceforge.net/
Oct 30 16:57:12 <prpplague> i started on an arm7tdmi port of uzix but never finished
Oct 30 16:57:38 <[g2]> vmaster Pin 3 on the JTAG header ? http://www.k9spud.com/bbmicro/schematic-1.0.php
Oct 30 16:58:12 <vmaster> [g2]: yeah, exactly
Oct 30 16:58:22 <vmaster> [g2]: you have to pull it to ground with 4.7k-120k
Oct 30 16:58:28 <AchiestDragon> one of the first cpus i ever programed on was a z80 , and back then it was all manual assembly into hex 
Oct 30 16:58:44 <vmaster> s/120k/10k/
Oct 30 16:58:44 <purl> vmaster meant: [g2]: you have to pull it to ground with 4.7k-10k
Oct 30 16:58:52 <prpplague> AchiestDragon: hehe yea
Oct 30 16:59:14 <[g2]> vmaster would that be the same a sreset ?
Oct 30 16:59:23 <prpplague> AchiestDragon: i sold my rockwell kit a few years ago on ebay, got almost $900 for it
Oct 30 16:59:42 <vmaster> [g2]: sorry, not sure what you mean?
Oct 30 17:00:50 <AchiestDragon> i had a nascom 1 back in 1979 , shame i nolonger have it , it went years ago now 
Oct 30 17:01:12 <[g2]> vmaster I meant board reset or just connected to ground
Oct 30 17:01:55 <prpplague> AchiestDragon: i started hacking the Gameboy a few years back, thats what got me into hacking kids toys
Oct 30 17:01:57 <vmaster> [g2]: just pulled to ground
Oct 30 17:02:07 <prpplague> AchiestDragon: now its my passion, hehe'
Oct 30 17:03:19 <[g2]> vmaster sorry I'm such a noob
Oct 30 17:03:44 <vmaster> [g2]: hold on... the user manual seems to contradict itself...
Oct 30 17:03:53 <[g2]> we've got the high speed GW adapter working with the XScale and Xilinx S3
Oct 30 17:05:29 <[g2]> I'd like to get it working with the lpc now
Oct 30 17:08:15 <vmaster> [g2]: do you have the LPC2103 user manual?
Oct 30 17:08:15 <vmaster> page 250 says:
Oct 30 17:08:15 <vmaster> On the LPC2101/02/03, the pins TMS, TCK, TDI, TDO, AND TRST are multiplexed with P0.27 - P0.31. To have them come up as a Debug port, connect a weak bias resistor (4.7-10 k& depending on the external JTAG circuitry) between VSS and the RTCK pin.
Oct 30 17:08:55 <vmaster> later on page 252 it says:
Oct 30 17:09:05 <vmaster> For debugging with JTAG pins, RTCK must be HIGH as the RST pin is released (see Figure 66). RTCK may be driven HIGH externally or allowed to float HIGH via its on-chip pull-up.
Oct 30 17:09:57 <[g2]> vmaster great! Thanks for the detailed pointer
Oct 30 17:10:07 <vmaster> yeah, but doesn't vss mean ground?
Oct 30 17:10:42 <[g2]> yeah I think the mean ground
Oct 30 17:11:21 <[g2]> I'll have to look at the schematic and see how RTC is pulled (if at all)
Oct 30 17:11:27 <[g2]> RTCK
Oct 30 17:11:27 <vmaster> it's not pulled at all
Oct 30 17:11:41 <vmaster> the olimex 2103 board pulls it high
Oct 30 17:11:52 <vmaster> http://www.olimex.com/dev/images/lpc-h2103-sch.gif
Oct 30 17:13:42 <[g2]> on the k9spud board it look that there's a reistor on RTCK
Oct 30 17:14:19 <vmaster> acorrding to the schematic it's only a series resistor
Oct 30 17:14:30 <[g2]> and debug select has a jumper
Oct 30 17:14:32 <vmaster> of 51ohm
Oct 30 17:14:36 <[g2]> nod
Oct 30 17:14:44 <vmaster> yeah, but you need RTCK and DBGSEL
Oct 30 17:14:50 <vmaster> the olimex board pulls both high
Oct 30 17:14:54 <vmaster> to 3.3V
Oct 30 17:15:09 <[g2]> the jumper pulls it to 3.3
Oct 30 17:15:39 <[g2]> I just need to jumper J7
Oct 30 17:17:13 <[g2]> if it gets pulled high, then it needs to be connected with a resistor to be pulled HIGH and they don't mean GND but really VSS
Oct 30 17:18:13 <[g2]> which means I might be able to pickup the V3.3 from the DebugSEL line
Oct 30 17:18:24 <vmaster> ah, yeah, DBGSEL has to be connected to 3.3V directly, RTCK needs to be connected through a resitor to 3.3V
Oct 30 17:18:45 <vmaster> RTCK needs the resistor because it becomes an output later
Oct 30 17:19:14 <[g2]> ok, so a 4.7K or 10K between there and v3.3
Oct 30 17:19:18 <vmaster> yeah
Oct 30 17:19:41 <[g2]> then we don't fry the RTCK I/O
Oct 30 17:20:21 <vmaster> http://www.k9spud.com/wiki/LPC2101/2/3_FAQ
Oct 30 17:20:22 <vmaster> hehehe
Oct 30 17:28:18 <[g2]> time for lunch
Oct 30 19:37:46 <[g2]> hey lennert 
Oct 30 19:38:00 <[g2]> vmaster pointed me to the right spot on the LPC2103 in the manual
Oct 30 19:38:00 <lennert> hey gee two
Oct 30 19:38:27 <[g2]> I think I may need to dig up 4.7K or 10K resistor
Oct 30 19:38:32 <lennert> right spot?
Oct 30 19:39:06 <[g2]> yeah, I'll e-mail you a the log
Oct 30 19:39:10 <lennert> k
Oct 30 19:42:55 <vmaster> [g2]: you got it working?
Oct 30 19:43:16 <[g2]> vmaster haven't tried yet
Oct 30 19:43:19 <vmaster> ah, ok
Oct 30 19:43:42 <vmaster> [g2]: you just need a resistor of several k - olimex is using 100k, and it still works
Oct 30 19:44:12 <[g2]> right now using lennert's sw we can identify the XScale and program the Xilinx S3
Oct 30 19:44:23 <[g2]> I'd imagine we can do other Xilinx stuff too
Oct 30 19:52:17 <vmaster> ah, i've read about it in the ep93xx backlog
Oct 30 20:22:52 <[g2]> vmaster do you support XScale at all ?
Oct 30 20:23:33 <[g2]> nbd welcome
Oct 30 20:23:53 <nbd> hi
Oct 30 20:23:56 <[g2]> nbd do you know lennert or vmaster ?
Oct 30 20:24:15 <nbd> no
Oct 30 20:24:22 <[g2]> lennert pushes about 1K things to l-a-k every day
Oct 30 20:24:33 <lennert> hi nbd
Oct 30 20:24:50 <nbd> hi lennert
Oct 30 20:24:56 <[g2]> I think he's maintaining several arches/machines in the ARM kernel
Oct 30 20:25:19 <[g2]> vmaster is the author of the openocd jtag software
Oct 30 20:25:19 <lennert> yeah, some
Oct 30 20:25:47 <vmaster> [g2]: xscale is partly working, i.e. most functionaly is there, but needs some cleanup
Oct 30 20:25:53 <[g2]> lennert and and I are playing with a JTAG adapter and I'm talking vmaster about supporting it with openocd
Oct 30 20:25:59 <vmaster> s/functionaly/functionality/
Oct 30 20:25:59 <purl> vmaster meant: [g2]: xscale is partly working, i.e. most functionality is there, but needs some cleanup
Oct 30 20:26:19 <[g2]> vmaster nbd has a sleeping board
Oct 30 20:26:40 <[g2]> it's and ixp4xx and he'd like to replace the bootloader
Oct 30 20:27:13 <vmaster> what type of flash is on this board? if it's a nor flash, jtag-tools might be the best choice
Oct 30 20:27:33 <[g2]> he's got a parallel adapter depending on the kind he might be able to pull the flash/memory controller/gpio/serial settings via JTAG
Oct 30 20:27:43 <[g2]> he's reflashed with openwince
Oct 30 20:27:51 <vmaster> yeah, that's what i mean
Oct 30 20:27:54 <vmaster> and it didn't work?
Oct 30 20:28:01 <nbd> i don't have a working redboot image
Oct 30 20:28:12 <nbd> and the original boot loader (rgloader) boots, but refuses to start images
Oct 30 20:28:21 <[g2]> oh it works, but he's trying to build a new RedBoot replacement
Oct 30 20:28:52 <vmaster> and you'd like to read the configuration registers using jtag?
Oct 30 20:28:57 <nbd> yeah
Oct 30 20:29:03 <[g2]> that's what I suggested
Oct 30 20:29:07 <vmaster> do you have access to a windows host?
Oct 30 20:29:27 <nbd> no
Oct 30 20:30:07 <nbd> could wine maybe do it?
Oct 30 20:30:08 <vmaster> does your parallel adapter carry both reset lines?
Oct 30 20:30:13 <nbd> yes
Oct 30 20:30:17 <nbd> i patched openwince for that
Oct 30 20:30:22 <nbd> because it wouldn't work without
Oct 30 20:30:50 <vmaster> i've been thinking about the macraigor software, but not sure if that's going to work with wine
Oct 30 20:31:08 <vmaster> does your adapter follow the wiggler layout?
Oct 30 20:31:18 <nbd> i think it's a lattice style cable
Oct 30 20:31:49 <nbd> i got it without any instructions or description
Oct 30 20:32:14 <nbd> i use the lattice driver in openwince (with an added line for the other reset)
Oct 30 20:33:50 <vmaster> let me check the openwince pin assignment
Oct 30 20:34:39 <nbd> i have it here:
Oct 30 20:35:13 <nbd> tdi -> 0, tck -> 1, tms -> 2, srst->3, trst -> 4, tdo -> 6
Oct 30 20:37:35 <vmaster> uhm, that's the jtag side?
Oct 30 20:38:01 <vmaster> what i meant was the parport side
Oct 30 20:38:01 <nbd> jtag -> parport pin
Oct 30 20:38:04 <vmaster> ah
Oct 30 20:38:05 <vmaster> ok
Oct 30 20:38:44 <vmaster> they have tdo on a data pin?
Oct 30 20:38:55 <vmaster> anyway, it's not going to work with the macraigor software
Oct 30 20:38:59 <lennert> tdo on a data pin, that's weird
Oct 30 20:39:32 <nbd> that's how i got it and it works for flashing with openwince :)
Oct 30 20:43:59 <vmaster> heh, ok, got it, it's status bit 6
Oct 30 20:45:21 <vmaster> you could try the OpenOCD, but I have absolutely no idea what's missing for IXP4xx support
Oct 30 20:45:45 <nbd> ok
Oct 30 20:45:46 <vmaster> i suppose it's big-endian?
Oct 30 20:45:51 <nbd> yes
Oct 30 20:46:46 <vmaster> is any of the signals inverted?
Oct 30 20:47:59 <nbd> i don't think so
Oct 30 20:48:32 <vmaster> you said you added srst? what do you output on it?
Oct 30 20:49:34 <nbd> there's a suggested sequence for bringing up the jtag port in one of the intel docs
Oct 30 20:49:43 <nbd> i just added it to the init in openwince
Oct 30 20:55:34 <nbd> hacking in support for my cable right now..
Oct 30 20:55:41 <vmaster> where?
Oct 30 20:56:12 <vmaster> in the openocd?
Oct 30 20:56:30 <nbd> yes
Oct 30 20:56:45 <vmaster> i've just committed my latest working tree to the svn repository, which adds the lattice cable
Oct 30 20:56:50 <vmaster> you need branches/xscale/
Oct 30 20:56:56 <nbd> ah, thanks
Oct 30 20:56:58 <vmaster> there's no xscale support in the trunk
Oct 30 20:57:11 <vmaster> i kept that separate, so it didn't affect the working arm7/9 stuff
Oct 30 20:58:24 <nbd> doesn't seem to set srst
Oct 30 20:58:32 <nbd> or is that handled differently?
Oct 30 20:59:10 <nbd> never mind
Oct 30 20:59:13 <nbd> looked in the wrong place
Oct 30 20:59:14 <vmaster> 	{ "lattice",			0x40, 0x10, 0x04, 0x02, 0x01, 0x08, 0x00, 0x00, 0x18 },
Oct 30 20:59:28 <nbd> yeah, found it now
Oct 30 20:59:30 <vmaster> the last byte is the initialization value, setting both resets high
Oct 30 21:00:04 <vmaster> what ixp is on your board?
Oct 30 21:00:57 <nbd> ixp425
Oct 30 21:02:30 <nbd> chip says ixp425ab
Oct 30 21:04:00 <vmaster> http://mmd.ath.cx/ixp425_lat.cfg
Oct 30 21:04:14 <vmaster> configure the openocd with --enable-parport
Oct 30 21:04:30 <[g2]> hmm that's the A stepping
Oct 30 21:04:30 <nbd> configured and compiled
Oct 30 21:04:36 <vmaster> you should be able to run it with openocd -f ixp425_lat.cfg
Oct 30 21:04:47 <nbd> i get http 403
Oct 30 21:05:05 <vmaster> ok, now?
Oct 30 21:05:07 <nbd> yes
Oct 30 21:05:50 <vmaster> if it fails with "error validating scan chain" you have a problem with the jtag setup
Oct 30 21:06:02 <nbd> it says cannot open device
Oct 30 21:06:23 <vmaster> you need root privileges for the direct i/o access
Oct 30 21:06:34 <vmaster> you could use ppdev, too (--enable-parport_ppdev)
Oct 30 21:06:42 <vmaster> but that's slower, therefor it's off by default
Oct 30 21:06:50 <nbd> i am root
Oct 30 21:06:55 <nbd> and direct access works with openwince
Oct 30 21:07:13 <vmaster> can you paste me the output?
Oct 30 21:07:41 <nbd> huh? i recompiled and it works
Oct 30 21:07:53 <nbd> now i get this:
Oct 30 21:07:53 <nbd> Error:   xscale.c:1269 xscale_deassert_reset(): couldn't stat() target/xscale/debug_handler.bin: No such file or directory
Oct 30 21:08:01 <nbd> but it's still running
Oct 30 21:10:30 <vmaster> is the executable in src/?
Oct 30 21:10:36 <nbd> yes
Oct 30 21:10:42 * vmaster checks if the debug handler is in svn...
Oct 30 21:11:02 <nbd> ah
Oct 30 21:11:02 <vmaster> is there a src/target/xscale/debug_handler.bin?
Oct 30 21:11:10 <nbd> i should run it from src ... :)
Oct 30 21:11:12 <vmaster> ah, yeah, sorry
Oct 30 21:11:17 <vmaster> it's very much work in progress
Oct 30 21:11:25 <nbd> no problem
Oct 30 21:11:25 <vmaster> you're the first one except me to run the xscale stuff ;)
Oct 30 21:11:29 <nbd> :)
Oct 30 21:11:46 <nbd> seems normal now
Oct 30 21:11:55 <vmaster> does it stop after some time?
Oct 30 21:12:05 <vmaster> or is there continous output?
Oct 30 21:12:11 <nbd> it's sleeping
Oct 30 21:12:14 <nbd> just one line of output
Oct 30 21:12:20 <vmaster> ah, run with -d
Oct 30 21:12:27 <vmaster> you can exit with "x <enter>"
Oct 30 21:13:04 <nbd> it doesn't stop
Oct 30 21:13:17 <vmaster> ok, that's bad
Oct 30 21:13:27 <vmaster> the debug_handler is currently compiled for LE
Oct 30 21:13:29 <nbd> i'll make a paste of what's running in an endless loop
Oct 30 21:13:43 <nbd> http://pastebin.ca/229684
Oct 30 21:14:25 <vmaster> the debug_handler needs byteswapping on BE then
Oct 30 21:14:46 <vmaster> problem is that i'm in a hurry
Oct 30 21:15:47 <nbd> should i recompile the thing or find a program to simply byteswap it?
Oct 30 21:16:29 <vmaster> the build script is in the target/xscale directory
Oct 30 21:16:34 <vmaster> recompiling might be easiest
Oct 30 21:16:46 <nbd> ok
Oct 30 21:16:54 <vmaster> gotta run now, i'll be back in about 2 hours
Oct 30 21:18:23 <nbd> the linker script is missing
Oct 30 21:18:31 <nbd> ok, we can continue later
Oct 30 23:55:14 <vmaster> nbd: i've added the linker script, and build options to build a big-endian debug handler, too
Oct 30 23:55:42 <nbd> ok. simply swapping the endianness with a script didn't work
Oct 30 23:55:50 <vmaster> nbd: you'll have to modify target/xscale.c - xscale_deassert_reset() to use the debug_handler_be.bin
Oct 30 23:56:01 <nbd> ok
Oct 30 23:56:19 <vmaster> not sure if there are other things missing - i'll have to look into BE xscales tomorrow (1am here)
Oct 30 23:57:15 <nbd> it's also 1 am here :)
Oct 30 23:57:19 <nbd> i'll check it out right now
Oct 30 23:57:19 <vmaster> if it doesn't work with the be debug handler, it would be nice if you could send me a complete log to Dominic.Rath <at> gmx.de (run with -l <logfile>)
Oct 30 23:57:30 <nbd> will do
Oct 30 23:57:30 <vmaster> heh, yeah, sleep is for the weak, and i AM weak ;)
Oct 30 23:57:55 <nbd> i need to skip sleep today to get my sleep cycle back in order :)
Oct 30 23:58:37 <vmaster> heh, i'd rather skip a day rather than skipping a night full of wonderful sleep ;)
Oct 30 23:58:43 <vmaster> anyway, i'm off, n8
Oct 31 00:06:02 <[g2]> sweet dreams vmaster 
Oct 31 02:09:48 <[g2]> nbd still up ?
**** ENDING LOGGING AT Tue Oct 31 02:59:57 2006