**** BEGIN LOGGING AT Thu Sep 20 02:59:57 2007 Sep 20 17:46:48 right, i've pulled my s3c24xx patches up to the latest Sep 20 17:47:01 just need to put some copyright headers on 'em and push to our quality control dept Sep 20 17:47:26 good news, my jtagkey arrived today... much nicer Sep 20 17:47:40 getting about 1 page every 2 seconds without acceleration Sep 20 17:54:05 good morning/afternoon/evening/night everyone Sep 20 17:54:16 evening here Sep 20 17:54:55 (same here) Sep 20 17:55:33 * fluff so loves watching gcc build... Sep 20 17:55:35 not Sep 20 17:58:32 hehe Sep 20 17:58:53 fluff: i assume that your jtagkey is ft2232 based? Sep 20 17:59:54 yep Sep 20 18:00:22 ahh Sep 20 18:00:24 fluff: got own key? Sep 20 18:00:36 fluff: rephrasing: got self-designed jtag key? Sep 20 18:00:40 nope Sep 20 18:01:00 our flyswatter jtag board is also ft2232 based Sep 20 18:01:05 i'm just working on the analogue front-end for one Sep 20 18:01:32 the test boards arrived this morning Sep 20 18:01:42 20 of them for ~50ukp Sep 20 18:02:12 fluff: nice Sep 20 18:02:32 fluff: you did see the hammer and sledge hammer board we are about to start selling? Sep 20 18:02:43 Anyone familiar with JTAG details here? Sep 20 18:02:44 i think so Sep 20 18:02:50 likewise: sorta Sep 20 18:03:02 http://www.elinux.org/Hammer_Board Sep 20 18:03:08 http://www.elinux.org/SledgeHammer_Board Sep 20 18:03:15 likewise: what aspect of JTAG? Sep 20 18:04:09 prpplague: I'm having JTAG issues with openocd. when we went from IXP420 B0 to B1 stepping, openocd fails here: if (!(field0_in & 1)) return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; in xscale.c/xscale_read_tx() Sep 20 18:04:30 B0 steppings performed fine with OpenOCD. Sep 20 18:04:46 which is here in the code: http://svn.berlios.de/wsvn/openocd/trunk/src/target/xscale.c?op=file&rev=206&sc=1 Sep 20 18:05:16 likewise: i'd have to look, but more that likely something match for the boundry scan Sep 20 18:05:22 * prpplague looks Sep 20 18:05:54 likewise: as to your reference of "JTAG issues" that's kind of like say "Car issues" Sep 20 18:06:03 likewise: there are alot of different aspects of jtag Sep 20 18:08:02 * drath tries to remember what that code is supposed to do Sep 20 18:08:39 drath: I think it wants to read a register set by the debug handler earlier. Sep 20 18:10:00 ah, i see Sep 20 18:10:08 drath: at first instance I assumed some IEEE JTAG IDCODE to not match, but there seems no such check for it. Sep 20 18:10:59 that function can be called to just check if there's data available (e.g. from xscale_poll()), or to actually consume data (if available) Sep 20 18:11:36 do you know where it got called from? Sep 20 18:16:59 drath: from xscale_poll() Sep 20 18:18:02 ok - did you run into the ERROR("error while polling TX register");? Sep 20 18:18:11 or did it just reply ERROR_TARGET_RESOURCE_NOT_AVAILABLE Sep 20 18:18:28 drath: no, it runs into the non-existing else case, i.e. as you say Sep 20 18:19:13 ah, ok, so there was just no data in the TX reg Sep 20 18:19:43 that's right after starting the OpenOCD? Sep 20 18:19:49 drath: ok, so the debugger handler probably does not run? Sep 20 18:19:54 apparently Sep 20 18:21:07 drath: yes, it's set for reset_init. The first time handle_target() is called, it hits this condition Sep 20 18:21:47 thereafter, handle_target() keeps getting called, but xscale_poll() always hits this condition. Sep 20 18:24:03 drath: Is my assumption right that openocd does not check for idcode? Sep 20 18:27:05 load_image is the command I want to send a file to the board Sep 20 18:27:13 to a given address in memory? Sep 20 18:31:01 ok, 6345bytes/second using load_image, is that thought to be ok for a jtagkey running full jtag speed to an arm926ejs? Sep 20 18:31:40 ok, forgot to enable fastness Sep 20 18:31:45 much annoyance Sep 20 18:35:18 using FTD2XX i achieved up to 120kbytes/s Sep 20 18:36:01 arm7_9 fast_memory_access and arm7_9 dcc_downloads is only safe if the target is running fast enough, usually that means enabled PLL Sep 20 18:36:10 which is why both are off by default Sep 20 18:36:22 libftdi is considerably slower Sep 20 18:36:41 likewise: yeah, the OpenOCD doesn't validate the IDCODE Sep 20 18:36:51 likewise: it reads it, and prints out the list of IDs found Sep 20 18:36:56 likewise: but otherwise ignores it Sep 20 18:37:13 drath: OK, because indeed the IDCODE is different for the stepping. Sep 20 18:39:11 hmm, using the working area causes an undefined instruction abort :( Sep 20 18:39:49 oops, uboot is running with mmi Sep 20 18:39:51 oops, uboot is running with mmu Sep 20 18:41:23 well, I like you all _lots_ Sep 20 18:45:03 fluff: generally you have to init a memory region in order to utilize a working area Sep 20 18:45:23 fluff: i have a small script that inits the sdram prior to usage Sep 20 18:46:43 fluff: http://www.pastebin.ca/704972 Sep 20 18:46:53 fluff: that inits the sdram for our s3c2410 board Sep 20 18:47:06 fluff: you can do something similiar on the s3c2440 of course Sep 20 18:47:58 fluff: you can also use the TCR in SOC's like the 2440, Sep 20 18:48:07 fluff: but ofcourse you are limited by the 4k size Sep 20 18:49:17 fluff: we have a nice little gui for use with openocd in production Sep 20 18:49:39 fluff: a patch to openocd provides more detailed feedback about the current state of a running script Sep 20 18:50:21 fluff: having MMU/caches enabled slows down a lot, because the OpenOCD has to invalidate caches to ensure cache coherency Sep 20 18:50:44 fluff: we are erase a 16mb nor flash, write the bootloader, 2 kernels, 2 ramdisks, and a small settings block in a little over 3 minutes Sep 20 18:51:19 prpplague: which jtagkey, which processor is that? 10 minutes here for 16 mb nor flash erase and program Sep 20 18:51:38 prpplague: with amontec jtagkey to ixp42x/be Sep 20 18:51:46 likewise: flyswatter usb jtag and s3c2410 at 200mhz Sep 20 18:51:52 all FT2232's are equal Sep 20 18:51:55 in terms of speed Sep 20 18:52:09 drath: so it depends on target alone? Sep 20 18:52:19 yeah - xscale and ARM7/9 is completely different Sep 20 18:52:22 drath: unless its a noisy design Sep 20 18:52:42 prpplague: heh, yeah, electrically there are huge differences Sep 20 18:53:18 the Olimex ARM-USB-OCD refuses to work with a Phytec LPC3180 board Sep 20 18:53:20 likewise: are you using dcc_downloads? Sep 20 18:53:32 prpplague: that command is arm7/9 specific Sep 20 18:53:44 drath: ahh, didn't know that Sep 20 18:53:45 hence the name "arm7_9 dcc_downloads " Sep 20 18:53:56 drath: so the xscale doesn't support that ? Sep 20 18:54:04 prpplague: XScale does that by default Sep 20 18:54:11 drath: right, i figured there was an equive for xscale Sep 20 18:54:21 prpplague: there's no other mode available on xscale Sep 20 18:54:27 ahh Sep 20 18:54:30 prpplague: you always communicate with a debug handler Sep 20 18:54:35 * prpplague doesn't deal with xscale Sep 20 18:54:48 drath: strange it achieves 30kbytes/s, could that really be the buffer size issue then? (restart overhead) Sep 20 18:55:25 likewise: what was your flash throughput? Sep 20 18:55:36 drath: 30 kbytes/second Sep 20 18:55:44 likewise: and RAM? Sep 20 18:56:07 while programming CFI strataflash, I did not measure RAM yet. I got stuck when my fellow engineer brought me a B-1 stepping IXP420 board... Sep 20 18:56:27 likewise: ah, ok - so you mean compared to the 120kb/s i achieved as a maximum? Sep 20 18:56:34 drath: yes Sep 20 18:56:59 likewise: well, that was downloading to an ARM920t - completely different debugging Sep 20 18:57:15 likewise: but yeah - larger blocks have a huge impact Sep 20 18:57:22 likewise: especially with XScale Sep 20 18:57:26 drath: ok. Sep 20 18:58:35 drath: I assume the debug handler is not run somehow. Where is it supposed to be started? Sep 20 18:59:36 it's installed in xscale_deassert_reset() Sep 20 18:59:58 and should run once the reset bit in the control register is cleraed Sep 20 19:04:30 drath: * wait 300ms; 150 and 100ms were not enough */ Sep 20 19:04:31 jtag_add_sleep(3000000); Sep 20 19:05:29 I tried various jtag_nsrst_delay values, our reset chip keeps SRST asserted for 150 ms Sep 20 19:06:17 likewise: i had to play around with these setting to get PXA27x working Sep 20 19:06:43 drath: interesting. so this value has nothing to do with jtag_nsrst_delay? Sep 20 19:06:47 likewise: apparently not all XScales are the same Sep 20 19:07:02 likewise: no - jtag_nsrst_delay is meant to account for delays introduced by the reset supervisor Sep 20 19:07:24 likewise: the delays in the code are meant to account for delays required by the core itself Sep 20 19:08:34 drath: ok, maybe I need to tweak with this hardcoded value. Sep 20 19:09:00 likewise: i'm just downloading ixp42x docs - maybe there's something in the specudates Sep 20 19:12:29 drath: 2.2, 2.3 and 2.4 mention only the SDRAM change. http://download.intel.com/design/network/specupdt/30642807.pdf Sep 20 21:38:01 drath: I was thinking, would a -script option to run a script and return the status of that be an option for the openocd command line? Sep 20 21:41:02 fluff: if i understand you correctly, you can already run a script from command line, but i don't believe the main tree of openocd returns a status Sep 20 22:01:43 fluff: the script is listed in the config file Sep 20 22:02:02 ah, so you give it a config with a script name to run Sep 20 22:02:32 fluff: correct Sep 20 22:02:41 fluff: one sec and i'll pastebin my config Sep 20 22:03:37 fluff: http://www.pastebin.ca/705195 Sep 20 22:03:43 fluff: thats the cfg file Sep 20 22:03:50 fluff: which then kicks off the script Sep 20 22:04:28 fluff: my script then inits the sdram, probes the flash, erases it, transfers the bootloader, kernel and ramdisk, then does a reset and exits openocd Sep 20 22:05:18 fluff: we added some options where each command that is being issued is echoed to the stdout Sep 20 22:05:21 hmm, it would be useful to know the result, to say something like an automatic programming system Sep 20 22:05:31 fluff: that way we can parse it a gui Sep 20 22:05:37 fluff: exactly Sep 20 22:06:28 fluff: we have 8 usb jtag dongles configured so we can gang program Sep 20 22:06:39 fluff: our gui guy did a really nice job Sep 20 22:06:50 * prpplague makes a note to take some pics tomorrow of production Sep 20 22:08:32 prpplague: interesting to see. Do you do a verify or checksum pass? Sep 20 22:09:14 prpplague: I have been thinking of writing an assembly CRC routine that runs from the IC or RAM, but my ARM assembly experience is non-existent. Sep 20 22:09:40 likewise: do it in C once the code starts running Sep 20 22:10:02 fluff: you mean a self-test? Sep 20 22:10:11 yeah Sep 20 22:10:59 likewise: yea we have some test routines that do tests on the sdram first, as well doing crc's on the stored apps Sep 20 22:11:37 prpplague: you run them from openocd, or when the target is up (self-test) Sep 20 22:12:16 likewise: actually we do both Sep 20 22:12:35 likewise: new unit is plugged in, operator uses a touchscreen panel pc to start the cycle Sep 20 22:12:55 likewise: first does a series of sdram initializations Sep 20 22:13:36 I'm creating an openocd-based production env right now, if you care to share your work I'm very much interested. Sep 20 22:13:36 likewise: then does 6 uploads of various data configurations and checks crcs Sep 20 22:13:52 likewise: then does the other flashing Sep 20 22:14:15 Currently I have a Cygwin icon that runs a SDRAM test, unlock, erase, flash, but that's about it. Sep 20 22:14:37 Then I got stuck with bugs in the CFI driver, which are now solved. Sep 20 22:15:03 * fluff gives openocd lots of hugses Sep 20 22:15:09 Now I am stuck in a B-1 stepping problem (timing?), and my deadline comes nearer... Sep 20 22:15:33 (ordered a BDI-2000 as fall-back...) Sep 20 22:15:50 fluff: indeed Sep 20 22:15:53 prpplague: sounds really need Sep 20 22:15:55 neat Sep 20 22:15:56 fluff: openocd is a gem Sep 20 22:15:56 likewise: ouch Sep 20 22:16:11 you sold bodyparts? Sep 20 22:16:15 fluff: ouch as in $$$? Sep 20 22:16:18 yep Sep 20 22:16:29 yeah, but we cannot delay production... Sep 20 22:17:19 and I need powerpc debugging also Sep 20 22:17:51 good nite, gotta get some sleep Sep 20 22:18:07 thanks for the help everyone Sep 20 22:18:08 yeah, it is almost midnight here Sep 20 22:18:14 12:15 here Sep 20 22:18:17 0:15 Sep 20 22:18:22 cu Sep 20 22:20:33 fluff: if you plan on using more than one jtagkey on a single machine, let me know, i can give you the tips-n-tricks we use Sep 20 22:20:58 we have one machine per jtag Sep 20 22:21:26 fluff: ahh ok, didn't know if you had plans to do production gang programming Sep 20 22:21:49 buying pcs is _cheap_ Sep 20 22:22:27 fluff: space isn't Sep 20 22:23:04 not a problem atm for us Sep 20 22:24:29 ahh Sep 20 22:25:02 fluff: our production areas are always in need space, so we almost always go with gang programmers for both space and time Sep 20 22:31:31 hmm, two load_images one after the other are causing the system to catch an undefined instructions, both times with r0 equal to the address of the second loadimage Sep 20 22:32:01 if you do them via the command line, it works Sep 20 22:33:19 fluff: scripted? Sep 20 22:33:57 yeah Sep 21 00:26:45 goodnight all **** ENDING LOGGING AT Fri Sep 21 02:59:57 2007