**** BEGIN LOGGING AT Wed Sep 24 02:59:57 2008 Sep 24 18:41:19 drath: greetings Sep 24 18:41:25 hey prpplague Sep 24 18:41:47 drath: any chance you had time to write up a wish list the next gen flyswatter board? Sep 24 18:42:02 drath: oh and any thoughts on the JRC support in openocd? Sep 24 18:43:31 prpplague: iirc you mentioned bit-banging the jtag signals - that feels a bit like wasted (computing) power to me Sep 24 18:43:49 prpplague: other than that, i guess an arm9 design that natively runs the openocd would be great Sep 24 18:44:39 drath: i'm not aware of any other jtag controllers other than the one that is available on the ft2232 Sep 24 18:45:08 drath: besides, doing bitbang interface isn't too bad, the linux kernel supports bigbanging both i2c and spi directly Sep 24 18:45:24 drath: without significant impact on performance Sep 24 18:46:31 prpplague: have you done any measurements on the possible tck frequency? you'll need two writes and one read per cycle Sep 24 18:46:51 prpplague: the arm9s i've seen can do only few mhz Sep 24 18:46:55 prpplague: on their gpios Sep 24 18:47:29 drath: initial test shows i can get around 10MHz Sep 24 18:48:29 prpplague: oh, if the s3c24xx is that fast it shouldn't be much of a problem Sep 24 18:48:57 drath: the other possibility is to use the spi controller and just trick it into doing jtag Sep 24 18:49:59 prpplague: either that, if it's flexible enough (some spis are pretty stupid...), or a small cpld for example Sep 24 18:51:10 drath: any other features other than just having a network connection? Sep 24 18:52:38 actually, bjdooks whats the best bitbang time you've been able to achieve on something like a 2440 ? Sep 24 18:52:45 s/2440/2410 Sep 24 18:53:24 prpplague: a good analog part, with flexible voltage shifting, and some gpios left to implement support for things that go beyond plain jtag Sep 24 18:54:05 drath: a good analog part? Sep 24 18:56:39 prpplague: level shifting at ~10mhz wont be too easy Sep 24 18:57:05 drath: yea, the ti part we have is pretty solid Sep 24 18:57:32 drath: we are still testing some stuff Sep 24 18:57:57 drath: what do you think the minimal tclk freq would be for a midrange device? Sep 24 18:58:04 5MHz? Sep 24 19:00:37 the ftdi equals sustained 1.5-2mhz - twice as good is definitely a minimum Sep 24 19:01:14 drath: i'll setup some more tests with the scope to see what we get Sep 24 19:03:53 regarding the JRC stuff - if this is going to become common among newer uC designs, i would like to see a clean implementation that allows the jtag chain to be adjusted during runtime Sep 24 19:05:06 drath: yea, from what i can tell, this the way most manufacturers are going when more than one device is involved, such as arm+dsp Sep 25 00:01:27 * flyback goes to cook a steak Sep 25 00:45:42 * flyback gets overwealmed Sep 25 01:52:42 * flyback bbl **** ENDING LOGGING AT Thu Sep 25 02:59:57 2008