**** BEGIN LOGGING AT Tue Mar 22 02:59:57 2011 Mar 22 08:37:54 hi Mar 22 08:39:11 ive been using a ft2232 jtag board (modified guruplug jtag module) with a mips board and openocd-git, is it normal that is is extremely slow? takes nearly 2 seconds to halt the cpu and reading memory is very very slow 57344 bytes in 3119.897949s (0.018 kb/s) Mar 22 08:50:44 doc|: what is your actual jtag clock? jtag_khz (or adapter_khz) Mar 22 08:52:14 ive tried jtag_khz 2000, 8000, and higher values, doesnt seem to make any difference at all Mar 22 09:39:22 afaik ft2232 can only do 6MHz (at least my amontec jtag-key tiny) Mar 22 09:54:40 so the performance i got is normal? Mar 22 12:54:35 no, I don't think so. i get this slow performance only with default setting (e.g. upon first connect). after setting jtag_khz 6000 halting the core is fast (<1s) Mar 22 13:09:31 i dont have the guruplug any more (its very badly designed) but i remember the jtag device worked fairly quickly with that, it certainly took only a few seconds to reflash the 225k uboot image, i dont get any errors and it does seem to work slowly, do you think its possible that the device is simply no good with mips or should it work ? Mar 22 13:40:55 i have no experience with mips at all. I only used arm Mar 22 13:42:26 npz.. ive posted to the ml Mar 22 17:52:39 doc|: I recall running -git in Feb, I had similar issues Mar 22 17:52:47 It was *slow* compared to the stable version Mar 23 01:47:44 hey there anyone use Urjtag? Mar 23 01:48:22 i did once, long ago Mar 23 01:49:19 humm, I'll post a screenshot of an output maybe you can learn me a bit on it Mar 23 01:49:34 http://img638.imageshack.us/img638/7619/linksyswrt54g.jpg Mar 23 01:50:57 so... what's the question? Mar 23 01:51:41 so whats DR length and what are potentially all the IR's it scanned? are those individual devices? Mar 23 01:51:53 no Mar 23 01:52:08 try 'detect' first Mar 23 01:52:25 alright uno mo mento, i need to plug this all up Mar 23 01:52:48 dr is data register and ir is instruction register Mar 23 01:53:01 they're explained in any decent jtag doc Mar 23 01:53:26 but you generally don't need to fiddle with them unless your devices is rare/unknown Mar 23 01:53:39 yeah I looked at the Urjtag doc at work today, still learning Mar 23 01:53:57 so basicly my goal is to mess with something thats unknown and read flash and write flash Mar 23 01:54:25 so I thought id start with a ddwrt54g that I have connected to my busblaster now.. Mar 23 01:55:21 so I get a really long device ID manufacturer, stepping, and file name, I'm guessing on an unknown device all I would get would be device ID if I have all my wires connected properly and the device was unknown, is this a safe assumption? Mar 23 01:55:27 well, afaik urjtag relies on boundary scan so to work with flash you generally need a bsdl file Mar 23 01:56:27 I see I have a lot to learn. can you create a BSDL file? Mar 23 01:57:09 well, in theory yes, but you can't just guess Mar 23 01:57:23 it describes all the pins on the chip and what they do Mar 23 01:57:35 Oh.. Mar 23 01:57:36 so it sorta assumes you know what you have Mar 23 01:58:00 brute force sounds neat, but not sure if it applies here Mar 23 01:58:54 if it's an arm it might be better to try openocd, it works using the cpu core and so is less dependent on the actual chip pinout Mar 23 01:59:38 open ocd work in windows or do you need cygwin, and or just better have a linux notebook or what? Mar 23 02:01:11 it can work in windows but you might have to build it yourself Mar 23 02:01:31 ill put it on linux then, wonder if it would work in a vm Mar 23 02:02:06 might be tricky Mar 23 02:03:24 so is urjtag kinda worthless in comparison to openocd? Mar 23 02:04:46 no Mar 23 02:05:19 it can do some stuff openocd can't Mar 23 02:09:41 i see well I'll be sure to poke around with it some more, would you know how to read the contents of flash? I'm having some issues trying to dump my wrt to a file **** ENDING LOGGING AT Wed Mar 23 02:59:57 2011