**** BEGIN LOGGING AT Wed Apr 15 02:59:57 2020 Apr 15 07:46:37 Okay,ping me once you add this i'll take a look.I want to see the indept software side of the logic and the parsing logic for the math input. HydraulicSheep Apr 15 08:17:23 also add a a section why you want to use js and not python,wont python simply be easier ? Apr 15 08:23:40 Python would probably be easier starting from scratch. However, a very high quality expression parser and solver example already exist in js. Here is the parser (https://github.com/josdejong/mathjs) and here is the stepwise solver (https://github.com/socraticorg/mathsteps). Simply adapting these and extending the solver's functionality to include calculus will make the whole process far smoother. It also allows Apr 15 08:23:40 me to focus more on the IO and covert features of the board (including good UI/UX and scripting integration). I prefer python and am more proficient in it but I think that this existing body of solid work will lead to a more valuable project. Apr 15 14:32:14 Why was i kicked Apr 15 14:37:16 jkridner: Today's there will be a meeting right? Apr 15 15:10:43 Actually, I agree, @Pac23 : Python makes more sense and I am far more familiar with it. Reimplementing such a parser wouldn't be too challenging using these two js libraries as a guide. The timeline has been adjusted to reflect this on the elinux. Apr 15 15:11:35 Further, the use of Python on ARM systems is far better documented - a simple CPython implementation is possible. Apr 15 15:29:38 exactly,and to top it off a lot of embedded dev's(students to be specific) are on c & python so people can add more functions to this in the long run Apr 15 16:20:54 hi all Apr 15 16:27:43 Hello everyone Apr 15 16:28:20 Hello everybody Apr 15 16:28:52 hi all, jkridner I was kicked from the mentor backchannel due to some 'IRC connection failure' Apr 15 16:29:19 Hi all Apr 15 16:30:30 pratimugale: invited, joined and left Apr 15 16:31:03 jkridner: I haven't yet created a new page, but I have noted what all i will be doing in the new combined proposal Apr 15 16:31:30 Heya Apr 15 16:31:45 Hey guys! Apr 15 16:32:00 hi all Apr 15 16:32:18 There is some problem with the bridge, i got kicked automatically and since then my messages are being sent twice Apr 15 16:32:32 hello everyone Apr 15 16:34:30 jkridner: Sorry, I changed my network connection right now Apr 15 16:37:29 hi deepankarmaithan Apr 15 16:37:46 jkridner: hello Apr 15 16:37:56 vedant16: yes, the bridge seems to be frequently flaky. Apr 15 16:39:47 jkridner: I shared with you my repo updates. Do you have any suggestions or guidelines for me. Now i am studying the communication between the PRU and main processor using remoteproc. The earlier implementation is using UIO but that is not compatible with the latest kernal Apr 15 16:40:35 @jkridner:matrix.org: regarding the REPL loop. I read around a bit. It will be better to build a language on top of Botspeaks. Apr 15 16:41:16 * jkridner: regarding the REPL loop. I read around a bit. It will be better to build a language on top of Botspeaks. Apr 15 16:45:13 @jkridner: i am working on the cloud9 examples and overlays repos, i have not added anything to the repository yet. I will push things within a couple of days. Apr 15 16:45:24 jkridner: I have also started with the ground work for LKMs will update the repo in few days Apr 15 16:47:17 vedant16: super! Apr 15 16:48:27 @freenode_ds2:matrix.org: As per your suggestion of pipelining the GPGPU (SGX) + TIDL, I wonder if leveraging the GPU will cause more complexity than improving the performance considerably. Apr 15 16:48:35 I did a course as i had stated in the proposal, nand2tetris part 1, i built a assembler. currently doing part 2, which teaches all about compilers and interpreters. This will help right? Apr 15 16:49:08 pradan[m]: I honestly do not know....the SGX is an odd piece of HW Apr 15 16:50:24 * I did a course as i had stated in the proposal, nand2tetris part 1, i built a assembler. currently doing part 2, which teaches all about compilers and interpreters. This will help right? jkridner Abhishek_ Apr 15 16:50:52 I Have setup TIDL but the Darknet-converted-to-TensorFlow model is not compatible with TIDL import tool. Apr 15 16:50:52 So I am still trying to import compressed/optimised YOLO models. Apr 15 16:51:15 ds2 pradan : if it really is in parallel, as long as you bite of a right-sized hunk, I'd think you'd have to find some way to get some benefit. Apr 15 16:51:35 getting some profiles would be the tricky 1st step. Apr 15 16:52:25 I think the new ImgTec images with tools are on Debian 9. rcn-ee knows a bit about them. Apr 15 16:52:53 cfriedt: I don't think we are doing anything directly related to your projects, but are you thinking about doing a bit of mentoring this summer? Apr 15 16:52:57 jkridner[m]: the transfer times to and from the SGX may dominate/lag behind... a lot of it is A->B->C->D..... so if one step lags, the next step will be delayed Apr 15 16:53:40 OTH.... we may be able to start multiple A's...B's etc Apr 15 16:54:09 pradan[m]: do you know what layers is the import tool not liking? Apr 15 16:56:32 jkridner: Any recommendations for peripherals on the cape? Apr 15 16:57:04 pardan[m]: if we can narrow down the layers, prehaps the TI folks can point out where in the TIDL stuff to plug in another implementation of that layer Apr 15 16:59:48 > pradan: do you know what layers is the import tool not liking? Apr 15 16:59:48 The Darknet models aren't directly supported, and after converting them, there are several layers with arithmetic names : multiplication, etc... Somewhat odd Apr 15 17:00:58 deepankarmaithani: you're designing a cape with a parallel bus? Apr 15 17:01:12 deepankarmaithani: I might be behind on a few messages. Apr 15 17:01:23 jkridner: yes Apr 15 17:02:01 > pardan[m]: if we can narrow down the layers, prehaps the TI folks can point out where in the TIDL stuff to plug in another implementation of that layer Apr 15 17:02:01 Its more of a greedy approch that's needed for it. I'LL need to convert these models to all supported formats(probably with OpenCL or NNPACK) and check which one works. Apr 15 17:02:02 pradan[m]: this is yolov2-tiny? Apr 15 17:03:50 > pradan: this is yolov2-tiny? Apr 15 17:03:50 Yes. But now I am also trying v3-tiny. Apr 15 17:03:50 Currently, I am trying to convert TF to TFLite and then import it into TIDL but the former conversion from Darknet to TF seems to disturb the graph and turn it unsupported for the conversion Apr 15 17:04:27 vedant16: okay, any thoughts on how you would go about implementing it Apr 15 17:05:23 jkridner: No problem take your time. I was thinking the cape should have few components that one can use for just evaluating and understanding the bidirectional bus and then the second cascaded shift register can be used to interface some more peripherals. Apr 15 17:05:40 I am thinking of trying the CAFFE version too. Although there are mobilenet or other flavors of YOLO based models (kinda fake YOLOs) and they have a higher chance of getting supported while import Apr 15 17:06:13 Mobilenet is a different approach Apr 15 17:08:31 * pradan[m] sent a long message: < https://matrix.org/_matrix/media/r0/download/matrix.org/FXruYCpFKTpQhjBwPFJnNdtw > Apr 15 17:09:01 pdp7_: do you have thoughts regarding deepankarmaithani cape? Personally, I'd lean toward something useful for CNC-type applications where you might need more I/O. Apr 15 17:09:46 CNC needing more IO? how many axises? Apr 15 17:10:19 more end-stops Apr 15 17:11:04 the Machinekit folks have said in the past they want more I/O than a BeagleBone has... which is a bit surprising to me. Apr 15 17:11:18 having a buffer in between also helps with isolation. Apr 15 17:11:32 ends tops on a GPIO? Apr 15 17:11:42 I'd be worry about reaction time Apr 15 17:12:49 homing switches maybe Apr 15 17:14:41 k, homing. Apr 15 17:15:04 @ds2 jkridner that means we need at least 16 i/o for 4axis Apr 15 17:15:16 homing == signal to know where things are; end stop == signal to know things about to run off the edge Apr 15 17:15:45 deepankarmaithan: 16? how are you allocating the 4 per axis? Apr 15 17:16:35 you can home with the endstop too but end stops need a quick reaction time Apr 15 17:16:53 I did do some work with NEMA motor based on that it used 4 I/O per motor Apr 15 17:17:27 I will check the Machinekit website. Do they have any CNC description Apr 15 17:19:09 Is it possible that the performance be boosted by using one of the co-processors to pre-process the frames. I am not sure if serialization of the frames or any such process reduces the inference time. Apr 15 17:19:09 Also, will it deviate from the objectives? Apr 15 17:19:13 sakthr98: have looked at optimizing convolutions and such in C? Apr 15 17:19:22 pratimugale: I intend to implement a python like language Apr 15 17:20:47 pradan[m]: Yes but do you know if there is a way to do that? TIDL is somewhat of a black box :( Apr 15 17:21:18 say command is a = 1 Apr 15 17:22:41 jkridner: ds2 Should i target a cape for Beaglebone black or Pocketbeagle? Apr 15 17:23:03 I noticed that all the inference in the TIDL examples uses such pre-processed images : RGB values serialized as R values -> G values -> B values as single long array. Apr 15 17:23:12 it will be pushed onto a stack to convert it to botspeak Apr 15 17:23:54 I'll send the implementation details when complete Apr 15 17:24:13 pradan[m]: yes, that is a very annoying little detail :) Apr 15 17:25:20 pradan[m]: I wonder if RGB -> RRRRRGGGGGGBBBBB can be done quicker on the SGX instead of the ARM... Apr 15 17:27:57 deepankarmaithani: hmmm.... I guess I'd suggest PocketBeagle. Apr 15 17:29:01 Yeah exactly what I am thinking... it can surely help us create a pool of data ready to be fed to the model. Although need to see if it gives some improvement Apr 15 17:30:35 pradan[m]: it may help to figure out what options are available.... i.e. will both of these work and which is faster - 1 in texture, 3 out texture OR 1 in and 1 Apr 15 17:35:33 I'll continue with successfully importing converted models and report as I succeed :) Apr 15 17:35:33 Also if time permits, I am thinking of giving FeatherCNN a shot. Just to see if this so called **state-of-the-art** lib can help us... Apr 15 17:37:31 jkridner: okay i will put that in consideration. I read about cape manager to automatically load the overlays, and read somewhere that it is no more a recommended way in the latest kernal. Though not sure. Your comments on it. Apr 15 17:39:14 deepankarmaithan: yes, Cape Manager is no longer recommended, though u-boot now has a cape manager script that runs at boot time to load overlays.... but only at boot time. Apr 15 17:39:47 deepankarmaithan: the PocketBeagle doesn't load overlays by default, but I've been considering changing that. Apr 15 17:42:54 Ok i will search for the script , i also found a similar shell script for automatic pin configuration in exploring beaglebone book Apr 15 17:45:43 jkridner: ds2 I think thats it for now.Thankyou for your responses Apr 15 17:47:08 Thanks everyone 😊 and Good night Apr 15 17:48:39 nwan[m]: if I had a BeagleBone AI with your IP streaming stuff, would I be able to create a video wall? Apr 15 17:49:54 vedant16: do you have an updated elinux entry to reflect doing Botspeak as your REPL? any thoughts on getting my hack to work? Apr 15 17:51:07 @jkridner:matrix.org: you could use it to stream to a video wall with different AVB endpoints Apr 15 17:51:52 jkridner: to be honest, I am not able to think clearly, how exactly am i going to implement it. Since using a stack is way out of question. Apr 15 17:54:20 One way to do it, could be page ram. Write a wrapper for the PRU, to be even able to run micropython. I have not updated it on elinux page, i am yet in a stage where i am not very clear about implementation. I am sorry for being Apr 15 17:54:20 basically you could use it for all kinds of streaming applications within a network. AVB allows for tight synchronization of your endpoints within that network so a video wall can be built within an AVB network Apr 15 17:54:22 * One way to do it, could be page ram. Write a wrapper for the PRU, to be even able to run micropython. I have not updated it on elinux page, i am yet in a stage where i am not very clear about implementation. I am sorry for being late. Apr 15 17:58:01 jkridner: I have a question regarding the equipment. If I am informed correctly every accepted student gets the hardware device which he needs for his project. Is this right? Apr 15 18:01:16 jkridner: Because until now I just have a BBB here. The other stuff for the AVB-network (AVB endpoints, AVB Switch, Grand Master Clock) and an oscilloscope for testing is accessible at my university **** ENDING LOGGING AT Thu Apr 16 02:59:57 2020