**** BEGIN LOGGING AT Tue Mar 21 03:00:02 2017 Mar 21 03:25:08 zmatt: Yeah, that's what I was assuming I'd have to use. TI seems to say that reads to main memory are ~50-100 cycles, which is fine. Mar 21 03:25:45 but actually setting up such a memory region is what I don't know how to do Mar 21 03:30:05 (also does the PRU have some sort of cycle counter? I suspect I'm gonna end up with _large_ tracts of nop loops between reads, but if it drifts too far in aggregate, that might be a problem Mar 21 03:30:29 not sure if it actually will be, I haven't exactly characterized how sloppy my timings can get before it stops working) Mar 21 03:30:30 it has a cycle counter yes, and also a stall coutner Mar 21 03:30:35 ok sweet Mar 21 03:30:42 also local timers Mar 21 03:31:57 and I know for uio-pruss you can reserve some DDR3 memory in DT Mar 21 03:32:22 in general there are probably ways to rudely reserve some fixed memory in DT Mar 21 03:32:54 DT? Mar 21 03:32:56 I personally often reserve some of the on-chip SRAM for DMA purposes Mar 21 03:32:57 devicetree? Mar 21 03:32:57 device tree Mar 21 03:33:25 seems like with remoteproc a lot of the stuff that was done with the devicetree in UIO has moved into the firmware resource table Mar 21 03:34:07 remoteproc is one of those rare topics I know absolutely nothing about :) Mar 21 03:35:11 to me remoteproc seems like it adds overhead and restrictions without bringing any benefit Mar 21 03:35:46 but I may be wrong, since I don't really know anything about it Mar 21 03:37:08 the main benefit to me is that apparently UIO is depricated and is going to disappear at some point, and if you use remoteproc you get the PRU C compiler Mar 21 03:37:31 also remoteproc is apparently generalizable to other SoC Mar 21 03:37:32 s Mar 21 03:38:08 uio isn't going to disappear, and even the generic uio_pdrv_genirq (which has been around since the dawn of time) suffices for most purposes Mar 21 03:38:25 It's what I'm using cause I know jack about either way, and I don't want to put effort into learning a way that has "DON'T DO IT THIS WAY IT'S OLD SEE THIS OTHER WAY" on top of all of TI's docs Mar 21 03:39:06 yeah, TI saying that is having about this much impact: https://xkcd.com/1726/ Mar 21 03:39:07 and I'm somewhat of an intellectual masochist Mar 21 03:39:15 hahahaha Mar 21 03:39:31 just like kernel people saying you shouldn't use gpio from userspace Mar 21 03:40:24 the PRU C compiler is a mixed bag.. on one hand I understand some people like it, and their needs from PRUSS are simple enough that it works for the purpose Mar 21 03:41:12 I mean, the docs on it are terrible. The actual process of building/installing/etc firmware for it has so far been not that hard once I figured out that 99% of the things they reference aren't in the right place Mar 21 03:41:23 on the other hand the PRU instruction set is designed for hand-coding, and is quite poorly matched to the needs of C Mar 21 03:41:34 and pasm is quite a fancy assembler Mar 21 03:42:03 and PRU is often used for purposes where getting cycle-accurate timing is important, which you lose instantly when using the C compiler of course Mar 21 03:42:18 eh, really it's more the masochism and the desire to make the process suck less for anyone following in my footsteps Mar 21 03:42:20 either way, how you generate your program is separate from how you load it onto the PRU Mar 21 03:42:34 ya'd think Mar 21 03:42:38 except that it's not Mar 21 03:43:19 clpru has a bunch of wacky linker magic Mar 21 03:43:34 so the binaries it generates aren't AFAICT compatable with the UIO loading method Mar 21 03:44:02 (at least I couldn't do it, and I had a wizard who actually knows how linker scripts and objcopy work over my shoulder) Mar 21 03:44:40 if you xxd them there's some differences in the generated code too, even if my main() is just a big asm block Mar 21 03:45:07 I haven't looked at it much since I don't care about clpru, but it looked to me like it's basically the same as their other compilers (e.g. for DSPs), and simply outputs ELF Mar 21 03:45:11 I couldn't find a table of the instruction encoding to compare them semantically tho Mar 21 03:45:25 dispru Mar 21 03:45:34 didn't work on the clpru generated ones Mar 21 03:45:39 IIRC Mar 21 03:45:51 eh, dispru *only* works on clpru generated ones Mar 21 03:45:54 (this was like 3 weeks ago and I've basically flushed that all from cache so might be wrong on that one) Mar 21 03:46:02 okay maybe got it backwards Mar 21 03:46:02 well, unless you give the magic options to work on a raw binary probably Mar 21 03:46:26 you can get their toolchains to produce raw binaries as well Mar 21 03:46:38 alternatively doing ELF loading from userspace via uio shouldn't be too hard either Mar 21 03:46:39 huh. I guess I didn't see that option Mar 21 03:47:06 I definitey tried the latter, and the program didn't run Mar 21 03:47:15 then you did it wrong ;) Mar 21 03:47:19 vOv Mar 21 03:48:02 Either way, I know the differences betwee uio and remoteproc and I'm not particularly interested in doing it with uio Mar 21 03:48:04 with only 2048 instructions worth of iram per core, I personally wouldn't be in that much of a hurry to throw parts of it away as overhead Mar 21 03:48:09 in spite of the fact that that's a rather insane decision Mar 21 03:48:43 the clpru generated .text segments aren't bigger, they're different. Mar 21 03:49:20 well they're different because it generates ELF by default instead of a raw binary Mar 21 03:49:48 yeah, and in theory objdumping the .text segment of the ELF should be the raw binary. Mar 21 03:49:58 it can often be bigger because the compiler produces awful code output for many benign-looking code sequences Mar 21 03:50:41 in that case I wasn't actually using _any_ C expressions, just main () { asm: } Mar 21 03:52:25 AFAICT the only reason that remoteproc is such a b**** is becasue the docs are an anachronistic mess Mar 21 03:52:49 It's like if you did a git checkout of a compete docset and randomized the revision that each file comes from Mar 21 03:52:58 that said, I kind of enjoy blazing a trail through such things Mar 21 03:52:59 and int main() { return 0; } apparently uses 258 bytes of iram Mar 21 03:53:02 o.O Mar 21 03:53:14 what does return 0 from main even mean on a PRU? Mar 21 03:53:23 ask TI Mar 21 03:53:41 or check the surrounding framework code Mar 21 03:53:46 I think TI includes sources Mar 21 03:54:35 cause my ASM program used IIRC 12 bytes more with clpru than pasm even when I made it longer Mar 21 03:55:08 and that was (IIRC, again, this was awhile ago) 8 bytes at the beginning and 4 at the end, and otherwise it was _mostly_ the same Mar 21 03:55:25 I didn't try anything particularly sophisticated, it waited in a busy loop for a host interrupt and then sent one back Mar 21 03:55:26 ah wait maybe this prog isn't quite minimal, even though it includes no other code from me in the final link Mar 21 03:56:44 heh Mar 21 04:03:01 https://gist.github.com/mvduin/656a1f85f20a0f0be59814595f4044e0 Mar 21 04:04:25 in principle loading an ELF is really simple since you can ignore everything but the program headers Mar 21 04:05:43 to answer your question, the return value from main is evidently ignored Mar 21 04:06:23 though you can fish it out of the core after the program has exited of course Mar 21 04:06:27 oh bizarre, there's a bunch of extra crap in the .out file Mar 21 04:06:43 a better question is, why the fuck do they end in a deadloop instead of invoking HALT ? Mar 21 04:06:50 I was dumping directly from the .obj, whcih has an 8 byte text segment, which is closer to what I expected Mar 21 04:07:04 yes the .obj just contains the return 0 Mar 21 04:07:20 which is 2 instructions Mar 21 04:07:48 but as the word "return" indicates, main needs to be called from something Mar 21 04:08:33 another excellent question: why the hell is it loaded to offset 0x4 ? Mar 21 04:09:48 O_o Mar 21 04:10:50 yeah I kind of assumed that return from main wouldn't do anything Mar 21 04:11:28 or would be equivalent to __halt() Mar 21 04:18:24 https://gist.github.com/mvduin/db10c09436f21f3e72e25e3f26a91e32 some of these are hilariously bad Mar 21 04:18:53 hahahahaha wow Mar 21 04:18:56 (scroll down for C source) Mar 21 04:19:53 _Z3lt3s == lt3(unsigned short) is funny Mar 21 04:20:07 this is at maximum optimization level Mar 21 04:20:23 -O3 or -Os? Mar 21 04:20:32 (does clpru even have s?) Mar 21 04:20:32 this isn't gcc Mar 21 04:20:40 yes but it works differently Mar 21 04:20:41 guess that means no Mar 21 04:20:49 it has similarly shaped arguments though Mar 21 04:21:18 ehm, almost no argument is remotely similar to gcc Mar 21 04:21:33 -O looks like it, but isn't Mar 21 04:21:35 -O is? IDFK I've been using the Makefiles that come with it Mar 21 04:21:39 -O0 does not mean "do not optimize" Mar 21 04:22:30 it also has -i ala gcc Mar 21 04:22:45 -I you mean Mar 21 04:22:53 -i is library include path, which is -L for gcc Mar 21 04:23:24 some options I use are: -v3 --hardware_mac=on -O4 -mf -op3 Mar 21 04:23:31 --symdebug:none -on2 Mar 21 04:24:16 oof, I guess I don't remember GCC as well as I thought I did Mar 21 04:24:32 anyway, lt3(uint16_t) is the perfect example of mismatch between C and the pru instruction set, combined with utter stupidity of the compiler Mar 21 04:25:57 C has no arithmetic or comparison operators that accept anything smaller than an int, so the uint16_t gets implicitly converted to an int Mar 21 04:26:08 a *signed* int that is, not an unsigned one Mar 21 04:26:37 isn't that kind of the point of using 'int' rather than 'intxx_t'? Mar 21 04:27:10 int means "pick the size of number that my architecture is good at" Mar 21 04:27:29 except PRU is great at uint8_t, uint16_t, uint32_t Mar 21 04:27:34 and sucks as int32_t Mar 21 04:27:35 *at Mar 21 04:27:42 also known as int Mar 21 04:28:16 how is it good at uint32_t and not int32_t? Mar 21 04:28:28 does it not have signed int instructions? Mar 21 04:28:33 it has no signed comparisons, nor arithmetic shift right, nor a signed multiplier Mar 21 04:28:34 (I'm not familiar with its ISA at all) Mar 21 04:29:13 so then writing those functions in ASM would be just as ugly? Mar 21 04:29:23 if you actually want the semantics you're describing? Mar 21 04:29:45 IMO it's reasonable for a C compiler to generate crap code if you ask it to do something that the architecture is bad at Mar 21 04:29:46 if I wanted to test x < 3 for an uint16_t x, that would be 1 instruction Mar 21 04:29:59 and that's what I wrote in C Mar 21 04:30:05 aaaaaah Mar 21 04:30:33 I understand how it got there, which is by following the requirements of the standards, combined with utter stupidity of the compiler Mar 21 04:30:50 C tends to be very eager to convert stuff to int Mar 21 04:31:09 and specifically int, not uint Mar 21 04:32:16 so in this case it implicitly converted the uint16_t to an int Mar 21 04:32:31 that's... pretty dumb... Mar 21 04:32:45 immediately forgot the knowledge that the range is limited to non-negative numbers Mar 21 04:32:56 loaded 3 into register Mar 21 04:33:20 and performed a generic signed int comparison, which involves xoring both operands with 0x80000000 and then doing an unsigned comparison Mar 21 04:33:47 and for some reason it inserted another instruction which is completely inexplicable to me Mar 21 04:33:54 I wonder if it's less dumb if you make it (uint16_t)3? Mar 21 04:34:07 no Mar 21 04:34:14 C has no operator < (uint16_t, uint16_t) Mar 21 04:34:50 it has operator < (int, int) and operator < (unsigned, unsigned) and likewise for *larger* integer sizes Mar 21 04:35:03 and will upgrade smaller types to int in preference to unsigned int Mar 21 04:35:43 all this wouldn't matter if the compiler were smart enough to track the actual range of the operands Mar 21 04:37:35 uhh... waait what? Mar 21 04:37:42 is this code output even correct... Mar 21 04:38:25 ah wait this is for int16_t, not uint16_t, never mind Mar 21 04:38:36 I'm not that good at demangling C++ symbols in my head :P Mar 21 04:39:24 that means I'd need 2 or 3 instructions in assembly I guess Mar 21 04:40:15 oh C++ Mar 21 04:40:17 okay, the uint16_t version is not quite as bad, so I take back my statement about the compiler doing no range analysis, it does seem to be doing some Mar 21 04:40:19 that explains the overloading Mar 21 04:40:45 was a bit confused by how that compiled at all for a bit Mar 21 04:41:10 the mangled symbols weren't a giveaway? or the file suffix for that matter :P Mar 21 04:41:34 didn't pay attention to the suffix, and figured it might be some wacky thing clpru does, given that it's definitely not your usual C compiler Mar 21 04:41:51 and no, IDK crap about symbol mangling, figured that was just a thing it did Mar 21 04:42:01 I don't usually get this far down into toolchains Mar 21 04:42:17 no, a thing it does is write symbols with || around them for some reason, otherwise the assembler won't accept them Mar 21 04:42:26 the fact that I was sterting to get there is part of why I gave up on getting clpru to generate uio binaries Mar 21 04:43:36 like, I like to think I'm p aight at C, but I've only ever done it for x86_64, and in that domain, the compiler is generally trustworthy Mar 21 04:43:52 and when it turns out not to be, there's another guy in the office who knows this stuff :) Mar 21 04:44:09 another difference is that x86 and C are decently matched, and x86 assembly is hideous and not something you want to write if you can help it Mar 21 04:44:52 pru has some awesome instructions that I don't imagine a C compiler will be able to take advantage of Mar 21 04:46:16 I was expecting to be using asm for the timing-sensitive bits and chunks of C for the communicating-with-the-host bits and then nop loops that wait for "however many more microseconds it takes to get to " Mar 21 04:46:37 for microseconds it probably makes more sense to use a timer Mar 21 04:47:03 especially since any ddr3 access makes the cycle counter useless Mar 21 04:47:13 wait, it counts as one cycle? Mar 21 04:47:18 it ? Mar 21 04:47:22 ddr3 read Mar 21 04:47:25 like Mar 21 04:47:25 no Mar 21 04:47:37 oh right, eh Mar 21 04:47:37 I know Mar 21 04:47:38 hmm Mar 21 04:47:39 so I was thinking Mar 21 04:48:01 right you can use the cycle counter, you can't use a simply loop Mar 21 04:48:06 sorry, got those confused Mar 21 04:48:06 read cycle counter, do DDR read, read cycle counter again, subtract first from second, spin for the remainder Mar 21 04:48:11 i.e. you can't use instruction-counting Mar 21 04:48:16 no Mar 21 04:48:18 def not Mar 21 04:48:27 cause DDR reads are very loudly nondeterministic in time Mar 21 04:49:28 the cycle counter however stops when it hits 2^32-1 Mar 21 04:49:30 :) Mar 21 04:49:36 _stops_? Mar 21 04:49:39 or resets? Mar 21 04:49:40 stops Mar 21 04:49:46 it's meant to profile stalls Mar 21 04:49:51 can you reset it? Mar 21 04:50:01 hence both the cycle-counter and stall-counter halt once the cycle-counter would overflow Mar 21 04:50:04 yes you can Mar 21 04:50:08 okay that's even easier then Mar 21 04:50:13 reset, ddr read, read cycle counter Mar 21 04:50:40 if a ddr read takes 2^31 cycles, there's definitely something wrong lol Mar 21 04:50:56 I don't know if you need drift-free timing or not Mar 21 04:51:33 lol no overflow is not an issue with that approach :P Mar 21 04:51:40 I don't either, but knowing the people who make WS2812's that cost $3.50/meter ... whether or not I do is an entropy source. Mar 21 04:51:55 steppers definitely don't care Mar 21 04:52:04 the ws2812 does not care about drift-free timing Mar 21 04:52:36 not all "ws2812" chips are created equal. Apparently there's like 12 manufacturers that make things that are commonly sold as them Mar 21 04:52:43 yay china Mar 21 04:53:03 and I've definitely seen different brands that behave differently Mar 21 04:53:47 fortunately, I have a case of ones that match Mar 21 04:54:22 I mean, really, I could just go use somebody else's program to control them cause there's like 4 projects on github that I _know_ will do this, buuuut that wouldn't be very fun. Mar 21 04:55:01 I used eHRPWM Mar 21 04:55:17 setup DMA to change the duty cycle every period Mar 21 04:55:30 (yes I'm crazy) Mar 21 04:55:51 ha nice. Mar 21 04:55:57 oh in case you're wondering I did so from userspace Mar 21 04:57:32 the most ballin' way I've seen to control them is with an 800kHz SPI channel and a circuit made of a transistor, a resistor, and a capacitor. Mar 21 04:57:52 too much external circuit Mar 21 04:59:11 yeah, wasn't my project, and I can't find it now, but some people would rather solder than code vOv Mar 21 04:59:35 uhuh, or read the TRM to know what the am335x can do on its own Mar 21 04:59:50 the worst case of which would be the guy hooking up a 555 timer to GPIO on the beaglebone Mar 21 04:59:55 oh, thi wasn't beaglebone based Mar 21 05:00:01 I understood that Mar 21 05:00:09 or rather, I guessed that Mar 21 05:00:26 it may be a valid way to deal with the limitations of that microcontroller :) Mar 21 05:03:21 Alas, "valid" "best" and "easiest to find" are frequently very far apart Mar 21 05:04:01 before I learned about the BB I was doing this with a f*ing wiznet arduino shield. Those things _suck_ Mar 21 05:04:32 hello i want to know the root password for beaglebone black board Mar 21 05:04:50 which is compounded by the fact that the 'dweeno standard library is terribad an implements multi-byte read as a 4 byte SPI transaction for each byte Mar 21 05:04:54 i just bought it and when i execute sudo it is asking Mar 21 05:05:01 newbie_: there isn't one? Mar 21 05:05:23 try just 'su'? Mar 21 05:06:10 guess that worked? Mar 21 05:06:30 after su it asks for password Mar 21 05:06:45 if i just hit enter it says Authentication failure Mar 21 05:07:14 on the debian image the default user pw is 'temppwd', IDK what the shipping image is though. Mar 21 05:08:17 default account is debian/temppwd, root password is blank Mar 21 05:08:39 is that on the ancient angstrom that ships with it too? Mar 21 05:08:52 no idea, I don't do archeology Mar 21 05:09:22 yeeeaaaaaaaah, same. Mar 21 05:09:57 newbie_: cat /etc/dogtag Mar 21 05:25:41 I guess not... Mar 21 06:17:16 the level of suck of the tps65217 still amazes me.... like the status bit indicating "battery charging complete (battery full) or battery removed" Mar 21 06:17:27 it can't tell the difference... -.- Mar 21 06:25:43 I have Linux beaglebone 4.4.30-ti-r64 #1 SMP Fri Nov 4 21:23:33 UTC 2016 armv7l GNU/Linux Mar 21 06:25:59 Manual for Pimux operations? Mar 21 06:26:17 Trying to use BBBCSIO c# mono Mar 21 06:30:34 Apteryx_: config-pin -h Mar 21 06:32:43 zmatt: thanks Mar 21 06:42:07 hello how to change ip address of my beaglebone black board Mar 21 06:42:53 man ip Mar 21 06:43:24 specifically 'ip addr add ' Mar 21 06:44:15 i am connecting via usb interface to my pc (usb0 specifically) Mar 21 06:44:36 wanted to change the default ip of beagleboard as deafult is same in aal boards Mar 21 06:47:22 newbie_: edit /etc/network/interfaces - Backup image first! - man ip for more nfo Mar 21 07:00:15 gm Mar 21 07:00:38 ge Mar 21 07:09:41 gtz Mar 21 07:17:32 zmatt: do you know if the rcn ti-linux-kernel-dev/build_kernel.sh can be used to recreate a specific kernel from a debian image? Mar 21 07:26:43 I have no experience with building older tags... I don't see a good reason why it wouldn't work, but the readme refers to "yakbuild" if you want to do that (no experience with it) Mar 21 07:28:13 zmatt: easier, one just needs to modify version.sh and set it to the desired version Mar 21 07:28:50 hm, or not... Mar 21 07:39:54 lol no Mar 21 07:40:33 at the very least you need to check out the right tagged commit Mar 21 07:41:25 you may need to toss the KERNEL subdir to let it recreate it properly Mar 21 07:41:40 although iirc it usually figures that stuff out itself Mar 21 08:16:11 zmatt: yup, not so easy. Mar 21 08:16:25 probably easier to update the kernel on the board to the latest version Mar 21 10:22:43 zmatt: well, yakbuild it is Mar 21 10:30:23 zmatt: less sophisticated, but "just works" Mar 21 10:35:39 though there really should be a method to prevent shutdown of a hwmod without recompiling the kernel Mar 21 10:50:20 there is Mar 21 10:50:25 you can set a property on it in DT Mar 21 10:51:36 Hi, I tried to buy a beaglebone black but there was only beaglebone green available locally Mar 21 10:52:34 (I preffered the beaglebone black because it had a display port) Mar 21 10:53:00 Unfortunately I ended up with a beaglebone green from Seed Studios Mar 21 10:53:35 Now if I understand seedstudio's documentation correctly, there is not much differences between the two Mar 21 10:54:42 I also looked at upstream linux and in arch/arm/boot/dts/ the only differences between am335x-bonegreen.dts and am335x-boneblack.dts is the name Mar 21 10:55:01 uh, no Mar 21 10:55:08 that's definitely not the only difference Mar 21 10:55:09 In u-boot and barebox I don't find any beaglebone green Mar 21 10:55:25 u-boot definitely does have detection for it Mar 21 10:55:26 so does the software autodetects it automatically (there is an eeprom) Mar 21 10:55:29 ok Mar 21 10:55:39 based on eeprom yes Mar 21 10:55:49 thanks, so if I or my distro builds for beaglebone black it is supposed to work? Mar 21 10:56:17 if you have a correct dts file Mar 21 10:56:46 oh ok, I'm not up to date with the bootloader side, what do you mean exactly: Mar 21 10:57:10 1) the bootloader loads the linux bonegreen dts and passes it to linux? Mar 21 10:57:15 it's recommended to use one of the kernels from rcn, these contain patches/fixes/improvements for the beaglebone that haven't necessarily been integrated upstream yet Mar 21 10:57:17 2) the boneblack dts works Mar 21 10:57:35 the boneblack dts should not be used since it tries to enable hdmi Mar 21 10:57:37 3) you are refering to both kenrel and the dts used by u-boot somehow Mar 21 10:57:55 zmatt: you mean kenrel dts? Mar 21 10:57:58 the dts (or rather dtb) isn't used by u-boot, it's used by the kernel Mar 21 10:58:03 ok Mar 21 10:58:11 so they didn't make use of it yet Mar 21 10:58:13 u-boot loads it and passes it to the kernel Mar 21 10:58:13 in barebox they do Mar 21 10:58:15 ok Mar 21 10:58:23 thanks a lot Mar 21 10:58:41 I'll make u-boot load the right dtb Mar 21 10:59:06 you shouldn't have to "make" it do anything, it should already do this Mar 21 10:59:30 ok, I'll check that it does it right Mar 21 10:59:43 ahh, those patches aren't upstream yet it seems Mar 21 10:59:45 https://rcn-ee.com/repos/git/u-boot-patches/v2017.03/0001-am335x_evm-uEnv.txt-bootz-n-fixes.patch Mar 21 11:00:13 (The developers are not ARM experts in the distro I use, and it indeed loads boneblack dtb Mar 21 11:00:16 ) Mar 21 11:01:09 The real issue I have is related to the ethernet PHY, but I want to make sure I have it setup correctly before trying to deal with that Mar 21 11:01:23 so use the u-boot from rcn, you can find them prebuilt at https://rcn-ee.com/repos/bootloader/am335x_boneblack/ Mar 21 11:01:39 I can compile u-boot Mar 21 11:01:56 is there a branch to use for the beagle? Mar 21 11:01:57 I was just pointing it out since it's easier Mar 21 11:02:03 yes, np Mar 21 11:02:58 just apply the patch above to the base version v2017.03 Mar 21 11:03:21 ok Mar 21 11:03:23 thanks Mar 21 11:04:01 for kernels pick a branch of https://github.com/RobertCNelson/bb-kernel or https://github.com/RobertCNelson/ti-linux-kernel-dev Mar 21 11:04:37 ./build_kernel.sh , weak config if you want when the menuconfig appear, then grab a coffee while the scripts do the rest ;) Mar 21 11:04:46 or even ./build_deb.sh to build a debian package Mar 21 11:05:16 s/weak/tweak/ Mar 21 11:05:47 zmatt: the Ethernet PHY seem to have some issues on 4.10.3 Mar 21 11:05:57 haven't noticed any yet Mar 21 11:06:06 oh wait I'm still using 4.9 actually, nm Mar 21 11:06:08 ok, so it's probably my bad setup (wrong dtb) Mar 21 11:06:26 unlikely in this case I think Mar 21 11:06:31 ok Mar 21 11:06:48 I don't know whether the phy bug workaround is in mainline or a local patch Mar 21 11:06:55 I hate debugging Ethernet PHY issues, I do not understand ethernet and MII standards enough... Mar 21 11:07:14 It starts fine Mar 21 11:07:21 then at some point I think it autonegs again Mar 21 11:07:36 that would already be odd Mar 21 11:07:38 and ends up not working at the lowest speed (some 10M configuration) Mar 21 11:08:04 I've seen that exactly once, though I think it was caused by an esd incident Mar 21 11:08:10 mii-tool also has few registers Mar 21 11:10:01 I would suggest trying an official image for a while, or at least rcn's u-boot and latest 4.9-bone kernel, to help identify whether it's due to hardware issues or due to your choice of bootloader and kernel Mar 21 11:10:12 (userspace probably doesn't matter) Mar 21 11:10:15 The capabilities are also odd: 1000baseT-HD supported... Mar 21 11:10:24 that's definitely nonsense Mar 21 11:10:24 I didn't check the PHY datasheet yet Mar 21 11:10:34 does it supports that kind of speeds? Mar 21 11:10:36 no Mar 21 11:10:44 100baseTX Mar 21 11:10:46 ok Mar 21 11:10:55 okay... Mar 21 11:11:58 looks like a problem in mii-tool, ethtool gives correct info Mar 21 11:12:07 zmatt: should I check if there is a PHY driver or if a specific PHY driver probes? Mar 21 11:12:23 because it could be that there is no proper driver and that the generic PHY driver is used instead Mar 21 11:12:37 which would also explain why there is so few registers in mii-tool Mar 21 11:13:18 there is only 1k of register space shown Mar 21 11:13:33 # readlink -e /sys/bus/mdio_bus/devices/4a101000.mdio\:00/driver Mar 21 11:13:33 /sys/bus/mdio_bus/drivers/SMSC LAN8710!LAN8720 Mar 21 11:14:13 Generic PHY... Mar 21 11:14:20 that is it Mar 21 11:14:35 probably means broken device tree data Mar 21 11:14:37 let me look in /proc/config.gz if they did it right Mar 21 11:15:59 CONFIG_SMSC_PHY=y Mar 21 11:16:02 ok Mar 21 11:21:32 If I take origin/master on linux I have: .name = "SMSC LAN8710/LAN8720", .phy_id_mask = 0xfffffff0, .phy_id = 0x0007c0f0, /* OUI=0x00800f, Model#=0x0f */ Mar 21 11:22:07 and cat phy_id in /sys/bus/mdio_bus/devices/4a101000.mdio:00 says 0x0007ffff Mar 21 11:22:21 I'll build u-boot and install MLO first Mar 21 11:36:29 let's try now Mar 21 11:42:32 zmatt: ? there is no debugss representation in the dts for the am335xx Mar 21 12:00:47 thinkfat: that's an oversight then Mar 21 12:04:27 this is interesting, it seems that if I power the bbb via both a wallcharger and usb, and then power off, then 1. it will power on again 2. the ethernet phy fails to come up properly Mar 21 12:07:01 zmatt: did you check if the hardware actually supports that? Mar 21 12:07:23 zmatt: at work somebody fried a Sabre-AI board doing exactly that Mar 21 12:07:42 thinkfat: lol, yes the tps65217 is supposed to support that Mar 21 12:08:00 although now that you mention it, iirc it's buggy when you do so with no battery installed Mar 21 12:08:13 (yet another tps65217 bug) Mar 21 12:08:19 TM Mar 21 12:16:08 zmatt: oh, wow Mar 21 12:16:21 zmatt: debugger connected breaks resume also on linux Mar 21 12:20:19 ahh :) Mar 21 12:21:21 zmatt: i suspect some ICE effect ;) Mar 21 12:21:22 so then the question becomes, which aspect of "debugger connected" exactly Mar 21 12:21:26 indeed Mar 21 12:22:06 what's the debug core control register value you're using right now during suspend? Mar 21 12:23:02 zmatt: 0x2000 Mar 21 12:23:25 zmatt: tap control is 0x2108 Mar 21 12:24:22 and value read back? Mar 21 12:25:19 ummm Mar 21 12:25:24 gute frage Mar 21 12:25:24 you could try clearing bit 13 in the core control register too btw Mar 21 12:25:55 zmatt: current scripts don't read back the value Mar 21 12:26:01 zmatt: but I can try to implement that Mar 21 12:26:21 see also my script which I linked a while ago Mar 21 12:26:50 yes, I have stored that somewhere Mar 21 12:26:51 not reading back is not really polite anyway, in theory you're supposed to poll some changes for acknowledge :P Mar 21 12:26:54 zmatt: oh, wow Mar 21 12:27:12 zmatt: I reconnected to the target with bit13 cleared and it immediately woke up Mar 21 12:27:23 wtf? Mar 21 12:27:57 does openocd maybe set a vector catch or whatever? Mar 21 12:28:19 no, not imeplemented yet on cortex_a target Mar 21 12:28:31 hmm Mar 21 12:28:33 implicitly for semihosting, but that is not enabled Mar 21 12:28:55 I'm now even more curious what the core register reads back when it's "stuck" Mar 21 12:29:35 ok, but before I satisfy your curiosity, I'll have to have to check where my bored little son went Mar 21 12:29:43 the little mischief is up to something! Mar 21 12:29:45 heh, ok Mar 21 12:33:06 actually he wasn't, he went to bed Mar 21 12:33:16 for 5 full minutes Mar 21 12:33:21 ! Mar 21 12:34:05 btw it's also possible the mere write caused it to release, rather than specifically clearing bit 13 Mar 21 12:34:10 no Mar 21 12:34:13 ok Mar 21 12:34:30 tested again, jtag connect -> standby -> resume -> ok Mar 21 12:34:34 then I'm wondering if it's in WiR even though you didn't specifically request it Mar 21 12:34:36 what does bit 13 do? Mar 21 12:35:01 zmatt: WiR would fit the effects I'm observing, yes Mar 21 12:35:03 debug enable, connects to DBGEN or whatever that control signal is called Mar 21 12:35:13 eh, but it works without that, too Mar 21 12:35:23 what does? Mar 21 12:35:25 debug Mar 21 12:35:32 you shouldn't be able to attach to the a8 without it Mar 21 12:35:44 then I'll try POR and see what happens Mar 21 12:36:37 or is that bit 13 of the DAP tap register? that seems illogical to me, and if so I have no idea what bit 13 of the a8 core control register connects to Mar 21 12:37:17 we're talking about bit 13 of reg 0x60 of the JRC, right? Mar 21 12:37:22 yes Mar 21 12:37:27 ok Mar 21 12:38:33 ok ok Mar 21 12:38:47 back to testing my own code. Mar 21 12:42:14 according to what I wrote in jbang... 0x60'002000, // assert cortex-a8 DBGEN Mar 21 12:42:17 indeed Mar 21 12:42:47 it's still bizarre that it hangs in secure world, it should ignore DBGEN for that Mar 21 12:43:08 hmmmm, maybe that's not entirely true Mar 21 12:52:06 it's not hanging in secure works Mar 21 12:52:08 world Mar 21 12:52:19 it's simply not exeuting any instruction Mar 21 12:52:29 and writing to 0x60 unwedges it Mar 21 12:52:33 right, it's being kept reset-asserted probably Mar 21 12:53:01 even though you didn't request that Mar 21 12:53:03 I just checked, the resume then continues, just I get a panic from my OS, which is not unexpected :) Mar 21 12:53:18 writing to 0x60, or writing 0 to 0x60 ? Mar 21 12:53:26 for now i wrote 0 Mar 21 12:53:39 I need to check writing the original 0x2000 Mar 21 12:54:11 and reading it back before/after writing! :) Mar 21 12:54:20 yes, yes, one moment Mar 21 12:54:45 afaik the official way to release reset is by writing with bit 17 set Mar 21 12:55:08 that is, if you want to release reset without reasserting DBGEN Mar 21 12:55:27 no, I want DBGEN of course Mar 21 12:55:39 *without deasserting Mar 21 12:55:59 clearing bit 13 should deassert DBGEN according to my notes Mar 21 13:00:36 thinkfat: in case I didn't share it before: http://pastebin.com/raw/dLtwPGm6 Mar 21 13:00:44 it probably does clear DBGEN Mar 21 13:01:18 I re-checked, if I don't set it on connect after a reset, I cannot attach to the DAP but I cannot halt the device Mar 21 13:02:12 *can attach to DAP Mar 21 13:02:19 yes that's expected Mar 21 13:04:47 I still just love bit 13 [r-] "This bit reflects the value of a system status signal" Mar 21 13:16:58 ok Mar 21 13:17:02 weird Mar 21 13:17:11 the value I read back is always 0 Mar 21 13:17:19 something not ok here Mar 21 13:17:50 do i need to send the connect sequence before I write to 0x60 ? Mar 21 13:18:42 dmesg Mar 21 13:32:52 thinkfat: you always need the connect sequences Mar 21 13:33:30 zmatt: Thanks a lot for the help! I know have a solution that I'll try to do: (1) The stock u-boot doesn't boot my distri and the environment is too complex to be understood given the time I have (2) My distro u-boot works fine if I set it to use the beaglebone green dtb, so I'll try to find a way to modify the distro u-boot environment on the SD Mar 21 13:33:38 *distro Mar 21 13:34:44 thinkfat: *sequence Mar 21 13:34:59 thinkfat: otherwise IR=router is just bypass I think Mar 21 13:35:07 readlink /sys/bus/mdio_bus/devices/4a101000.mdio\:00/driver | sed 's#.*/##' => SMSC LAN8710!LAN8720 Mar 21 13:44:13 I'll just sed black with green (sic) and it'll work Mar 21 13:54:42 brb reboot Mar 21 13:55:04 hi all, I am preparing a proposal for GSoC applcation for beagleboard.org this year - one of requirements is to collect quotes from community regarding usefulness of the project - can you please provide some feedback for my proposal? Mar 21 13:55:29 I am going to implement support for DMA transfers between PRU and A8 memory (Linux) using EDMA in kernel space Mar 21 13:57:29 if you are interested in details, I am creating detailed proposal here: http://elinux.org/BeagleBoard/GSoC/BeagleBone_PRU_DMA_-_Maciej_Sobkowski Mar 21 13:57:45 zmatt: indeed, and I also need to switch off background polling of openocd or it will constantly interfere Mar 21 13:58:11 ds2 is original author of the idea Mar 21 14:28:29 zmatt: ok the behaviour is a bit weird but consistent Mar 21 14:29:18 zmatt: basically I send the connect then a router-write of '0' to register 0x60 Mar 21 14:30:14 zmatt: the first write gets back a 00'000000, that's not plausible Mar 21 14:30:35 zmatt: the second write gets back a 60'2a00003 Mar 21 14:30:53 zmatt: the third write gets back a 60'280027 Mar 21 14:33:00 thinkfat: return values are pipelined just like AP accesses Mar 21 14:35:27 ok, so bit 17 cleared (module is in reset) Mar 21 14:36:45 bit 19 ? that's... odd Mar 21 14:37:23 I wonder if they repurposed it in the debug core register Mar 21 14:39:04 note that to perform a register read, do a dr scan with input 0xe0'000000 and then a dr scan with input 0x80'000000, the output of which is the register contents Mar 21 14:39:20 eh no Mar 21 14:39:35 bit 31 clear for read, set for write Mar 21 14:39:42 opposite of dap Mar 21 14:40:38 of course I can play with this too when I get home again :P Mar 21 14:49:02 zmatt: maybe you could give some thoughts on the PRU DMA topic? Your opinion would be really valuable for me Mar 21 14:51:18 zmatt: read-only gives 60'2A2003 Mar 21 14:51:24 zmatt: so, not writing anything Mar 21 14:53:39 zmatt: when I wake up the A8 through the M3, I get 60'282427 Mar 21 14:53:51 zmatt: but the A8 is not starting to execute anything Mar 21 14:54:00 ohh, that's a nice christmas tree of status bits Mar 21 14:54:18 bit 10 - debug attention needed Mar 21 14:55:26 then, writing a '0' gives back 60'280027 Mar 21 14:55:45 and the A8 finally starts to execute code Mar 21 14:56:19 bit 21 is write-1-to-clear Mar 21 14:57:16 this time we didn't see the module reset bit though, confusing... Mar 21 14:59:20 maciejjo: for PRU-triggered EDMA all you need is a chunk of reserved ddr3 (already possible) and reserve certain EDMA resources (already possible in DT) Mar 21 15:00:49 you mean this is supported in kernel drivers for PRU? Mar 21 15:01:13 note that the most interesting direction would be is ddr3->pruss triggered by the pru, since it can use that to hide the latency of reads Mar 21 15:02:00 allocating ddr3 is supported by uio-pruss and I think also remoteproc, reserving EDMA resources is supposed by the EDMA driver Mar 21 15:02:11 *supported Mar 21 15:02:17 yeah, the project is supposed to cover transfers in both directions Mar 21 15:03:37 to getting data *out* of the subsystem it's probably faster to just write from pru to ddr3 memory Mar 21 15:05:17 zmatt: 2a2003 makes certainly sense while the MPU is OFF Mar 21 15:05:17 your mention of dma engine suggests that you're talking about a8-triggered transfers, but those don't seem very useful to me Mar 21 15:06:00 thinkfat: ah I was looking with my nose apparently Mar 21 15:06:15 ok, so it's not quite WIR that's happening Mar 21 15:07:02 zmatt: no, but I'll change the tap enable sequence to clear the sticky status bits 22 and 21 Mar 21 15:07:35 indeed, what if instead of writing 0 you write 202000 Mar 21 15:08:18 zmatt: my plan is to write a module that would trigger the transfer on PRU's demand triggered by message via rpmsg Mar 21 15:08:38 maciejjo: lol, that sounds like the most inefficient way to use EDMA possible Mar 21 15:09:38 maciejjo: pru can trigger edma directly by register write, and then get its completion via the pruss irq controller Mar 21 15:10:21 ok, but can edma be used simultaneously by PRU and Linux? Mar 21 15:10:23 yes Mar 21 15:11:12 EDMA is designed to support multiple "clients", each with its own completion irq Mar 21 15:13:47 if TI hadn't made such a mess of integration it could even be done with full protection (i.e. pruss only able to meddle with its own DMA channels) Mar 21 15:15:25 so PRU should have some channels reserved by default? Mar 21 15:15:45 no, as I said you need to reserve those via DT Mar 21 15:16:49 ok, I thought this only concerned using EDMA from linux Mar 21 15:17:58 basically channels are implicitly reserve: if they're not used by linux, then they're free for other uses Mar 21 15:18:22 you also need PaRAM slots, those you can reserve explicitly using ti,edma-reserved-slot-ranges Mar 21 15:20:00 zmatt: ok, weird. bit13 really makes the difference, if I keep it on, the A8 doesn't start Mar 21 15:20:44 thinkfat: if clearing bit 21 (by writing 1 to it) doesn't help, try writing 1 to bit 10 Mar 21 15:20:55 ok, I see examples of that in dt binding doc Mar 21 15:24:31 well, I need to discuss it with ds2 then, his idea is to use linux API for DMA transfers, but maybe I can do both and compare performance Mar 21 15:26:16 zmatt: nope Mar 21 15:26:30 focus on Linux API Mar 21 15:26:30 zmatt: must clear DBGEN Mar 21 15:27:14 thinkfat: that seems silly... you sure there are no bits set in PRCR or something like that? Mar 21 15:27:29 zmatt: checking... Mar 21 15:27:45 or whatever other debug controls could be doing this (and be nullified by deasserting DBGEN) Mar 21 15:28:56 ds2: hi! ok, I will - but maybe if I still have time I can try to do it how zmatt proposed? or is it too much for the period? Mar 21 15:29:46 ds2: edma transfers triggered via rpmsg? that sounds like a rube goldberg contraption to me Mar 21 15:32:31 zmatt: who said anything about rpmsg? Mar 21 15:32:47 16:08 < maciejjo> zmatt: my plan is to write a module that would trigger the transfer on PRU's demand triggered by message via rpmsg Mar 21 15:32:48 ds2: I did Mar 21 15:32:59 maciejjo: I think that's too many things Mar 21 15:33:09 maciejjo: that is not the linux API Mar 21 15:33:40 but I need some way to trigger the transfer on the kernel side from PRU, right? Mar 21 15:33:56 rpmsg can eventually use it but..... Mar 21 15:34:03 yes Mar 21 15:36:06 the kernel sets it up Mar 21 15:36:32 the PRU (depending on direction) either consumes it or transfers it out Mar 21 15:36:42 but pacing is done on the PRU end Mar 21 15:37:04 that's all described by the DMA channel config Mar 21 15:37:55 zmatt: ah Mar 21 15:38:03 I suppose you can just setup a channel from linux and have PRU write to the manual trigger register to trigger the transfers Mar 21 15:38:53 zmatt: no point in xfering it faster then the PRU can handle Mar 21 15:39:08 ? Mar 21 15:39:19 I have no idea what you mean by that Mar 21 15:39:42 zmatt: the PRU should be the one writing the trigger so it can "allocate" time for it if needed Mar 21 15:39:51 that's what I just said Mar 21 15:40:00 yes, agreeing with you :D Mar 21 15:42:27 maciejjo: just to be clear... rpmsg can be a user of it but it isn't a required part of the PRU stuff Mar 21 15:42:51 he wasn't proposing making rpmsg use it Mar 21 15:43:04 zmatt: PRCR comes set to 0x5 when the MPU is woken up! Mar 21 15:43:22 ds2: he was thinking pru needed to use rpmsg to tell the cortex-a8 to trigger the dma Mar 21 15:43:23 zmatt: not actively by the debugger, but maybe by the icecrusher integration Mar 21 15:43:28 thinkfat: :D Mar 21 15:43:33 yes, precisely Mar 21 15:44:08 zmatt: that means PRCR.HCWR is set Mar 21 15:44:29 zmatt: ah Mar 21 15:44:32 so in the scenario you are describing dma engine calls are not used, but instead channels are only allocated in linux and PRU fires the transfers by writing to a designated register, is that correct? Mar 21 15:44:44 maciejjo: yes Mar 21 15:45:38 maciejjo: so if Linux wants to have a driver for a "soft peripheral" on the PRU - it should allocate and configure channel and then ask the PRU to signal when it is ready to sink or source data Mar 21 15:46:07 more or less the same model as other devices using DMA Mar 21 15:46:36 zmatt: however, clearing that bit does nothing Mar 21 15:46:39 but the goal here is not even to have thing THAT refine.... goal is to have some sample code to show it working Mar 21 15:46:51 zmatt: so I need to find another trick to let the cpu resume Mar 21 15:47:04 zmatt: clearing DBGEN does that, but probably not what I want Mar 21 15:47:30 thinkfat: well temporarily clearing it is probably not too bad, but strange to need it Mar 21 15:55:52 zmatt: any idea how ccs realizes the debugging across a suspend Mar 21 15:57:50 ds2: ok - but the 'singnal' part is what I am usure how should best be done - should PRU trigger an interrupt on A8 for this? Mar 21 15:59:00 zmatt: I think some icecrusher part is keeping the processor in halted state, waiting for a magic enchantment to release the ban Mar 21 15:59:18 zmatt: that would explain the strange MOE in the DSCR Mar 21 15:59:43 check if icecrusher's registers look different from normal Mar 21 16:04:13 must be some static halt request, the MPU stops again as soon as I set DBGEN Mar 21 16:04:23 o.O Mar 21 16:05:07 I can basically see it in DSCR Mar 21 16:05:24 status changes from "halted" to "resumed" and back Mar 21 16:05:43 so that suggests external debug request signal is asserted Mar 21 16:05:50 yup Mar 21 16:06:01 fascinating Mar 21 16:06:45 and I guess icecrusher is the only one who can do that Mar 21 16:06:59 it seems to be in the right place for it yeah Mar 21 16:07:05 is there any public documentation about that component? Mar 21 16:07:16 no, but I'll dig up the limited info I have Mar 21 16:07:48 ccs of course will interact with icecrusher in some way Mar 21 16:07:58 let's see where the registers are Mar 21 16:08:13 not on the apb, i guess Mar 21 16:08:18 they are Mar 21 16:08:43 also, according to my notes, external debug request comes from CTI Mar 21 16:08:52 o.O Mar 21 16:09:15 eh Mar 21 16:09:20 that makes not much sense Mar 21 16:09:44 CTI should cause a normal halting debug event... Mar 21 16:09:47 but I can check Mar 21 16:10:19 the question is then what component would be the source. CTI is only an adapter to the debug matrix Mar 21 16:10:23 http://pastebin.com/raw/UhmanSmx Mar 21 16:12:20 CTI is on 0x80002000 on the APB, right? Mar 21 16:12:46 no idea off the top of my head, check the Debug tab of my memory map spreadsheet Mar 21 16:12:49 https://gist.github.com/mvduin/a42a101050672dcf6845b3275d7213f7 Mar 21 16:24:40 cti register dump makes some sense Mar 21 16:24:52 input triggers: 0x61 Mar 21 16:24:58 that means core is halted Mar 21 16:29:10 zmatt: when i release DBGEN, trout status changes from 0x1FF to 0x7E Mar 21 16:29:23 that means the core-halt request is released Mar 21 16:40:59 zmatt: but the CTI is not the root cause Mar 21 16:41:33 zmatt: even when I disable it, the halt request is still enabled together with DBGEN Mar 21 16:45:23 zmatt: also, there is something configuring the CTI, because when simply start the system and dump the cti registers, it is off and has a "null" configuration, but when the system is in that strange "halted" state, the CTI is on and has some weird configuration Mar 21 17:02:10 zmatt: alright, cannot read the icecrusher on the apb or ahb, I get a jtag error Mar 21 21:26:50 Not that I need it, but has any one managed to make the gui debugger in the cloud 9 ide work with gdb of an already compiled program? I tried making a custom runner and nothing seems to work no matter how much tweaking I do. Mar 21 21:28:56 *work with gdb to debug an already compiled program? Mar 21 21:32:57 I thougt the cloud9 stuff was javascript Mar 22 00:03:24 On BBBlue, does the roboticscape service need to be running to charge a connected battery? Mar 22 00:04:09 Reason I ask is systemctl shows roboticscape status as failed **** ENDING LOGGING AT Wed Mar 22 03:00:01 2017