**** BEGIN LOGGING AT Mon Jun 26 03:00:04 2017 Jun 26 07:40:20 HI, I'd need some help to know what went wrong with my BBB wireless I changes the drivers yesterday and now the BBB isn't recognized anymore by my computer and I can't see it on the wifi anymore. Jun 26 07:40:45 How can I know if I broke it ? Jun 26 07:54:56 Ad_: what do you mean with "changed the drivers" ? Jun 26 07:55:36 in the worst case you can always just reflash the BBB Jun 26 08:02:52 HI yes I considered it but I have no sd card withme right now... N I hope I could avoid that. Jun 26 08:03:39 I meant I download the drivers from the BBB website while the computer already had its own and now it doesn't work Jun 26 08:05:14 no more wifi on the BBB and my computer don't recognize the BBB Jun 26 08:20:37 uhh, that sounds strange Jun 26 08:21:32 installing drivers on your computer obviously can't affect the bbb itself, and I don't see a plausible reason why it would make your computer unable to detect the bbb Jun 26 10:51:32 Yes, the strange thing is that it's not only my computer but all other computer now can't detect the BBB Jun 26 13:57:08 i'm trying to RTS to work on ttyO1 on the beaglebone black. without RTS, everything is working, i've added the following overview and test program: https://gist.github.com/anonymous/e6211f95bdeef0a0c80ad5fa41e4785f Jun 26 13:57:15 am i missing something still? Jun 26 17:26:33 Hi! I'm trying to work with the PRUs. I was trying to run pru_speak but the installation fails as described in https://github.com/deepakkarki/pruspeak/issues/9. Is there any other library that gives easy access to the PRUs like pruspeak? Jun 26 17:30:44 Or any idea on how to fix the installation issue? Thanks Jun 26 19:20:29 does any one have a problem with ipv6 not getting a dhcp addr? Jun 26 19:24:15 in connmanctl it is set to auto, but does not get one, if I run dhclient -6 wlan0 is does? Jun 26 20:39:34 is there some detailed info (possibly beagle bone specific) for the omap serial driver available? Jun 26 21:13:09 I’m trying to load an audio cape overlay with: Jun 26 21:13:11 root@beaglebone:/sys/devices/platform# echo BB-BONE-AUDI >/sys/devices/platform/bone_capemgr/slots Jun 26 21:13:27 But I get: Jun 26 21:13:27 -bash: echo: write error: No such file or directory Jun 26 21:13:34 Any idea what I’m doing wrong? Jun 26 21:13:43 root@beaglebone:/sys/devices/platform# uname -a Jun 26 21:13:52 Linux beaglebone 4.4.54-ti-r93 #1 SMP Fri Mar 17 13:08:22 UTC 2017 armv7l GNU/Linux Jun 26 21:14:51 /sys/devices/platform/bone_capemgr/slots does not exist Jun 26 21:15:03 use tab completion, probably got the path wrong Jun 26 21:16:12 oot@beaglebone:/sys/devices/platform# cat /sys/devices/platform/bone_capemgr/slots Jun 26 21:16:13 0: PF---- -1 Jun 26 21:16:14 1: PF---- -1 Jun 26 21:16:16 2: PF---- -1 Jun 26 21:16:17 3: PF---- -1 Jun 26 21:16:17 14: P-O-L- 0 Override Board Name,00A0,Override Manuf,BB-UART1 Jun 26 21:16:47 bsder: missing BB-BONE-AUDI.dtb? Jun 26 21:17:32 It’s present in the directories, but it is built into the initrd by deafult, no? Jun 26 21:19:01 afaik i needs to be in /lib/firmware/BB-BONE-AUDI.dtbo Jun 26 21:19:19 initrd shouldn't have any effect once you're booted Jun 26 21:20:39 root@beaglebone:~# ls -al /lib/firmware/BB-BONE-AUDI* Jun 26 21:20:40 -rw-r--r-- 1 root root 2859 Jun 26 08:11 /lib/firmware/BB-BONE-AUDI-02-00A0.dtbo Jun 26 21:20:41 -rw-r--r-- 1 root root 3104 Jun 21 07:55 /lib/firmware/BB-BONE-AUDI-02-00A0.dts Jun 26 21:20:59 have you tried echo BB-BONE-AUDI-02-00A0 > /sys/devices/platform/bone_capemgr/slots ? Jun 26 21:21:27 root@beaglebone:~# echo BB-BONE-AUDI-02-00A0 > /sys/devices/platform/bone_capemgr/slots Jun 26 21:21:28 -bash: echo: write error: No such file or directory Jun 26 21:21:40 what does dmesg show? Jun 26 21:21:59 [ 165.864212] bone_capemgr bone_capemgr: part_number 'BB-BONE-AUDI-02-00A0', version 'N/A' Jun 26 21:21:59 [ 165.864296] bone_capemgr bone_capemgr: slot #5: override Jun 26 21:22:00 [ 165.864340] bone_capemgr bone_capemgr: Using override eeprom data at slot 5 Jun 26 21:22:01 [ 165.864389] bone_capemgr bone_capemgr: slot #5: 'Override Board Name,00A0,Override Manuf,BB-BONE-AUDI-02-' Jun 26 21:22:16 you probably want to paste that somewhere Jun 26 21:22:39 Pulling in a UART works fine: Jun 26 21:22:41 root@beaglebone:~# echo BB-UART1 >/sys/devices/platform/bone_capemgr/slots Jun 26 21:23:26 What’s the pastebin people here use? Jun 26 21:23:42 no idea - but i imagine an anonymous (github) gist would work Jun 26 21:25:14 I agree that it looks like it isn’t picking it up. If I do something completely weird: Jun 26 21:25:18 root@beaglebone:~# echo TOTALJUNK >/sys/devices/platform/bone_capemgr/slots Jun 26 21:25:18 -bash: echo: write error: No such file or directory Jun 26 21:25:35 I get a similar dmesg: Jun 26 21:25:37 [ 376.577006] bone_capemgr bone_capemgr: part_number 'TOTALJUNK', version 'N/A' Jun 26 21:25:38 [ 376.577092] bone_capemgr bone_capemgr: slot #7: override Jun 26 21:25:39 [ 376.577135] bone_capemgr bone_capemgr: Using override eeprom data at slot 7 Jun 26 21:25:39 [ 376.577183] bone_capemgr bone_capemgr: slot #7: 'Override Board Name,00A0,Override Manuf,TOTALJUNK' Jun 26 21:30:24 not sure what errno you'd get in case of a resource conflict. but usually, dmesg will tell you Jun 26 21:33:20 Shouldn’t be a resource conflict. I make sure to have a clean set of slots. I disabled HDMI and eMMC. Jun 26 21:33:41 Agreed. Error show up if I try to averlay my custom UARTF and UART1. Jun 26 21:33:51 [ 140.296746] bone_capemgr bone_capemgr: slot #6: BB-UART1 conflict P9.24 (#5:BB-UARTF) Jun 26 21:33:51 [ 140.304911] bone_capemgr bone_capemgr: slot #6: Failed verification Jun 26 21:35:30 Must be some error in the cape. I guess I’ll have to start with the UART1 dtb and slowly mutate it into the AUDI dtb until I find the issue. :( Jun 26 21:35:47 try without the cape, if you suspect that Jun 26 21:36:11 how did you build the device tree? Jun 26 21:36:15 Sorry, it’s in the dtb for the cape. I already removed the cape. Jun 26 21:36:24 i see Jun 26 21:36:40 git clone https://github.com/beagleboard/bb.org-overlays Jun 26 21:37:16 ./dtc-overlay.sh; ./install.sh Jun 26 21:37:54 hmm, i can't help you further - i'm having a lot of device tree issues myself at the moment =( Jun 26 21:38:10 Adding a new dts file into src/arm automatically picks it up ... Jun 26 21:38:33 Yeah, the device tree is pretty impenetrable for beginners. Jun 26 21:38:47 Sorry, didn’t mean to call you a beginner. *I’m* the beginner on this. Jun 26 21:39:20 huh? oh, no offense taken =) Jun 26 21:39:41 i find it woefully underdocumented, that is all Jun 26 21:40:27 It also doesn’t help that any article older than 18 months is actively *wrong*. Jun 26 21:40:33 how so? Jun 26 21:40:45 I wish there was a StackOverflow button for “This answer is now wrong”. Jun 26 21:40:58 are we talking about more than the path of the capemanager? Jun 26 21:41:26 Oh, Angstrom is different from Debian. 3.8 is different from 4.1+. And, it seems like 4.11 is different again. Jun 26 21:42:15 Some things can be loaded dynamically. Some things need to live in the initrd. etc. Jun 26 21:42:25 I find it all very confusing. :( Jun 26 22:35:53 Hey, I'm having trouble with bluetooth on bbgw. it appears to not be initializing right. the command "sudo bb-wl18xx-bluetooth" returns "Wanted to write 4 bytes, could only write 0. Stop Can't initialize device: Success" Jun 26 22:36:08 any ideas on what I'm doing wrong? Jun 26 22:43:04 Hey all, does anyone have a link to some documentation on how to load code onto the M4 on the x15? Jun 26 22:47:52 bbarr: have you looked at the quickstart guide pdf here? http://elinux.org/Beagleboard:BeagleBoard-X15#BeagleBoard-X15_Hardware_Files Jun 26 22:52:38 bsx4242: I grepped through it and didn't find any reference to M4. Is there a section I should be looking for? Jun 26 22:53:54 that should get you up and running. what do you mean by loading code on it? you should be able to connect and get a shell prompt to do whatever. I don't have an x-15 personally, just trying to help while I wait for a response on my question Jun 26 22:55:12 (I'm just a hobbit waiting for the dwarves and elves to wake up, sorry I'm not much help) Jun 26 22:55:35 Oh yeah, the x15 has an A15 for the application processor, and an M4 for real-time applications. Jun 26 22:55:49 I got my A15 running happily, I'm hoping to get the M4 loaded up. Jun 26 22:55:57 bsx4242: Thanks! Jun 26 22:57:55 bbarr: https://groups.google.com/forum/#!msg/beagleboard/QGaZijgMwoI/5kuAQYjNCQAJ discussion on the M4 cores? Jun 26 22:59:36 Using Node.js and OBS for UART as a terminal server. Uart is running at 115200. what is the maximum transmit buffer when using serial.write( Jun 26 23:01:55 bsx4242: Found that earlier, it's close, but no examples. My rereading makes me think the TRM for the am57xx might help. Jun 26 23:03:05 bbarr: found a bit here: https://community.arm.com/iot/embedded/b/embedded-blog/posts/embedded-live-embedded-programmers-guide-to-arm-s-cortex-m-architecture but the site it links to is gone Jun 26 23:04:11 bbarr: last shot, https://www.udemy.com/embedded-system-programming-on-arm-cortex-m3m4/ $10 course on C and assembly for the ARM Cortex M processors Jun 26 23:04:38 bsx4242: awesome, thanks. Jun 26 23:04:54 I do what I can. it's not much, but I does it. Jun 26 23:05:14 bsx4242: What are you looking for help with? I'm new to the beagle, but I've been doing embedded work for a spell. Maybe I can help. Jun 26 23:05:49 Any bb demigods awake? I'm having trouble with bluetooth on bbgw. it appears to not be initializing right. the command "sudo bb-wl18xx-bluetooth" returns "Wanted to write 4 bytes, could only write 0. Stop Can't initialize device: Success" any clue what I'm not doing right? Jun 26 23:06:27 the "Can't initialize device: Success" part is maddening. Jun 26 23:06:36 haha Jun 26 23:11:12 bsx4242: I'm not familiar with that driver. I'm sorry. Jun 26 23:12:23 bsx4242: Did you see this thread: https://groups.google.com/forum/#!topic/beaglebone/ngcGap8-G8s Jun 26 23:13:01 yeah, didn't get me anywhere though. thank nonetheless Jun 26 23:13:38 bbarr: http://www2.keil.com/mdk5/learn seen that? Jun 26 23:13:55 and this? http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/DUI0553A_cortex_m4_dgug.pdf Jun 26 23:15:37 Yeah, I've played keil before. Jun 26 23:19:02 bbarr: you owe me a beer now, I think this is what youy want! http://processors.wiki.ti.com/index.php/PRU-ICSS_Getting_Started_Guide Jun 26 23:21:33 bsx4242: very cluse. The PRU-ICSS is the programmable realtime unit and industrial control system, it can be used to emulate things like ethernet. Jun 26 23:21:39 bsx4242: I'm looking for the IPU1 stuff. Jun 26 23:22:52 bsx4242: I think this is what I'm looking for http://processors.wiki.ti.com/index.php/IPC_Users_Guide Jun 26 23:23:07 bsx4242: but if you ever make it to RI or Oakland CA I'll buy you a beer. Jun 26 23:23:15 hah, thanks Jun 26 23:25:11 bsx4242: dm? Jun 26 23:36:03 bbarr: what do you want to know about ipu? Jun 26 23:37:31 zmatt: how to get new firmware into it mostly. And whether or not I can just big loop it instead of using TI's RTOS. Jun 26 23:38:45 I've written baremetal code a fair while ago for the dual cortex-m3 subsystem (ducati) on the dm814x, which is basically identical to ipu (aka benelli) apart from the m3 vs m4 Jun 26 23:39:55 I'm not familiar with any of the official tools though, I just used gcc and my own headers Jun 26 23:40:12 zmatt: how'd you get your firmware into the IPU? Jun 26 23:40:25 zmatt: and did your firmware communicate with the application proc? Jun 26 23:41:14 I'm guessing they probably use that remoteproc thing for it, but you can absolutely also just do it rudely from userspace :) Jun 26 23:42:06 e.g. you can just write code to its local memory, setup a few config vars maybe, and release one core from reset Jun 26 23:42:15 zmatt: how would that work? memory map some ram? Jun 26 23:43:21 it has 64 KB of local SRAM Jun 26 23:43:42 right. Jun 26 23:43:53 if you need more then you'd need to get some memory reserved elsewhere Jun 26 23:44:50 zmatt: shiny, thanks . Jun 26 23:45:04 I didn't need any... you can do a lot with 64KB when writing baremetal code :) Jun 26 23:45:31 zmatt: for sure. I just need to make sure the M4 can talk with the A15. Jun 26 23:45:50 you got shared memory, irqs, and "mailboxes" Jun 26 23:45:55 zmatt: Looks like there's some shared IPU ram I can memory map from the a15. Jun 26 23:46:02 zmatt: Mailboxes? Jun 26 23:46:06 you can map all of the aforementioned 64KB Jun 26 23:46:21 zmatt: Nice. Jun 26 23:46:47 mailbox is basically a fifo of 32-bit "messages", with an irq for the recipient to indicate a message is waiting Jun 26 23:47:00 not hugely useful Jun 26 23:48:28 zmatt: thanks, this is good info to start with. Jun 26 23:48:31 so, if the "Do It From Userspace™" approach sounds appealing, I'd suggest using the uio_pdrv_genirq driver Jun 26 23:50:08 with a little bit of configuration in Device Tree, that driver lets you map designated memory ranges into userspace (like /dev/mem, but limited to only those ranges declared in DT) as well as receive irqs, and as a bonus the kernel should take care of power management stuff for you (enabling the clocks to the subsystem and such when you open the device) Jun 26 23:50:48 zmatt: is a mailbox a real HW feature or is it a proposed software concept? Jun 26 23:50:53 hw Jun 26 23:51:13 they're in all recent TI SoCs Jun 26 23:51:16 including the am335x Jun 26 23:51:20 yes Jun 26 23:51:45 so it is an independant latch in the low level sense that is wired to generate an IRQ when it is written to? Jun 26 23:54:43 the peripheral has some number of 4-word fifos, and some number of irq outputs for the various processors in the SoC Jun 26 23:55:17 each irq output can be signalled if a fifo is non-empty (i.e. "can read") and/or not full (i.e. "can write") Jun 26 23:56:49 so for example the mailbox might have 12 fifos and 4 irqs, with the intention that one fifo is used for each pair of (sender, recipient) Jun 27 00:02:33 bbarr: if you want I can also check if it needed any important config... iirc its weirdass L1 MMU might need some setup Jun 27 00:03:59 zmatt: that'd be really helpful. thanks. Jun 27 00:06:45 what the holy shit the am572x has one mailbox with 8 fifos and 3 irq outputs, and TWELVE mailboxes each with 12 fifos and 4 irq outputs... (plus the dedicated IVA mailbox) Jun 27 00:07:08 I was just reading that. Jun 27 00:07:10 seriously the am572x sometimes really looks like someone hit "Paste" a few times too many Jun 27 00:07:15 That sounds like... plenty. Jun 27 00:08:14 It's a crazy processor. Jun 27 00:08:31 it really is Jun 27 00:10:01 do be careful when implementing IPC schemes, it can be very tricky to implement them *correctly* Jun 27 00:10:30 Yeah, I'm new to this IPC thing. I'm used to bare metal programming or embedded linux, but not both. Jun 27 00:11:02 I just meant IPC in the general sense of inter-processor communication, not anything linux-related Jun 27 00:11:31 Yeah, that I'm familiar with. I've been burned plenty. Jun 27 00:12:30 keep in mind that the various components here (cpus, memories, peripherals like the message boxes) are connected by what is basically a network, with a fairly complex topology with multiple "switches", and "messages" (memory write, memory read, read response) only remain in order as long as they travel along the same path Jun 27 00:13:23 zmatt: do you have any resources on writing IPC well? Jun 27 00:14:57 so if you write data to memory, then write pass a pointer to that data from a15 to m4 (or vice versa) via some different route (e.g. a mailbox), then the recipient might actually read stale data Jun 27 00:17:38 (not very likely mind you, it would probably require some really weird traffic patterns) Jun 27 00:18:56 I don't know of any good references I'm afraid... Jun 27 00:22:45 if your IPC needs are very low bandwidth then doing all communication via a pair of mailbox queues is definitely safe of course Jun 27 00:24:02 zmatt: I don't know my exact usecase yet, I'm just doing some initial exploration of the am57x. I suspect it'll be very low bandwidth. Jun 27 00:32:42 oh yeah, I was looking up ducuti/benelli init... was distracted for a bit Jun 27 00:35:41 utilizing both cores has an extra bit of "fun" btw: the MMU(s) do not distinguish between the two cores, so they have exactly the same memory view (apart from their private peripheral bus, 0xE0000000-0xE00FFFFF) Jun 27 00:37:55 hah, nice. That does sound like "fun" Jun 27 00:48:03 hmm, seems the default config of the mmu sufficed for my modest needs back then... I don't seem to be doing any real init of the subsystem... it seems I just enabled the subsystem in PRCM, wrote code to its local memory, and released one core from reset Jun 27 00:51:32 ah, I see some sneaky stuff in my linker script though Jun 27 00:53:46 apparently the default config of the MMU maps the first 16KB of code space (address 0) to the first 16KB of the local SRAM (at 0x55020000) Jun 27 00:55:16 and my application was only a few KB Jun 27 00:56:10 zmatt: thanks for the help. I really appreciate it. **** ENDING LOGGING AT Tue Jun 27 03:00:07 2017