**** BEGIN LOGGING AT Sun Feb 03 02:59:56 2019
Feb 03 16:07:42 <vdr> so Snert
Feb 03 16:07:47 <vdr> i agree
Feb 03 16:33:57 <Snert> Ma&Pa buy fractional shares of some coinfund and they have no clue about it all.
Feb 03 16:34:34 <Snert> that's how to lose money lol
Feb 03 16:37:27 <Snert> they shouldn't have to know about it to profit but problem is there's no profit to begin with unless the price doubles or something.
Feb 03 18:50:24 <mawk> my friend will rework the SPI implementation to use the FIFO
Feb 03 18:50:33 <mawk> so that's it's somewhat efficient
Feb 03 18:51:00 <mawk> in the meantime I'll use the "official" TI starterware implementation to rule out bugs coming from this
Feb 03 18:51:09 <mawk> to pin down what I'm doing wrong and where
Feb 03 18:51:20 <mawk> probably some race condition when handling the interrupt
Feb 04 02:33:24 <zmatt> mawk: beware that in my experience, starterware is a buggy pile of crap
Feb 04 02:34:41 <zmatt> I don't think I've looked at its mcspi driver, but some other drivers and examples worked by accident if at all
Feb 04 02:35:21 <mawk> lol
Feb 04 02:35:41 <mawk> well that's in starterware that we got the idea of writing characters one by one after each IRQ
Feb 04 02:36:43 <yttrium> hi
Feb 04 02:38:23 <mawk> https://github.com/punitvara/TI-Starterware/blob/master/examples/evmAM335x/mcspi/mcspiFlash.c#L476
Feb 04 02:59:13 <GenTooMan> using SPI a single character at a time. Wouldn't there be huge delays between the core and the IO port? I remember something like 200ns vs 5ns between IO from CPU and PRU respectively.
Feb 04 02:59:51 <GenTooMan> However I am not all know so I could be entirely wrong.
**** ENDING LOGGING AT Mon Feb 04 02:59:57 2019