**** BEGIN LOGGING AT Sun Nov 22 02:59:57 2020 Nov 22 04:09:12 zmatt: On page 7 of https://4dsystems.com.au/mwdownloads/download/link/id/187/ it talks about how the LCD screen will not power on unless the barrel jack is plugged in for the BBB. Since the BBai gets power from the USB-c do I need to make this modification Nov 22 04:24:20 yes, VDD_5V will never supply power to the cape on a bbai, it is meant to power the beaglebone from a cape Nov 22 04:28:59 ok Nov 22 14:23:10 zmatt: you work with audio a lot... what do you think of Bela and do you think it is a good platform for working with voice audio Nov 22 14:23:36 i assume you work with audio given you work on a speakers as a day job Nov 22 15:15:40 looks like it takes 5 cycles for an interrupt to propagate to r31 Nov 22 15:37:14 mm302: what are you building Nov 22 16:33:15 hi mattbooone, sorry for the delay. I was wrote an small sample app to clarify some uncertainties I had on the interrupts, looks clear to me now Nov 22 16:33:33 np Nov 22 16:33:55 cool, I eventually wish to understand interrupts but I am not there yet Nov 22 16:36:05 mm302: when triggered by a core via r31 you mean? Nov 22 16:36:21 (otherwise i'm curious how you measured it) Nov 22 16:36:30 it's just a fancy way of telling a core continue that thing you were waiting for is ready Nov 22 16:36:53 zmatt: yes Nov 22 16:42:42 I'm measuring 6 cycles, but it probably depends on how you define it Nov 22 16:43:36 5 cycles longer than the minimum conceivable Nov 22 16:44:59 yes, I measure 5 cycles + good read cycle so looks the same Nov 22 16:45:30 writing the event to r31 on cycle 0 results in the interrupt being visible in r31 on cycle 6 Nov 22 16:46:08 yes, I meant send_int - 5 cycles - read_int Nov 22 16:46:32 I should say irq rather than interrupt... it's not an actual interrupt since nothing is being interrupted :P Nov 22 16:47:19 I think it's fair to say interrupt, time is understandable due to the mapping but something to be aware of Nov 22 16:47:50 for example in my capture app I was thinking about using this system to start the capture at a precise moment Nov 22 16:48:03 a status bit in a register is not an interrupt, an interrupt is the control flow of a cpu being diverted on external request Nov 22 16:48:35 it's not just a status bit, the interrupt controller is involved Nov 22 16:48:57 the interrupt controller could just as easily be called event aggregator Nov 22 16:49:37 like, the name is traditional, and it is actually capable of triggering an interrupt on the cortex-a8, but the pru cores themselves don't have interrupts Nov 22 16:49:59 it's also marked by interrupt controller and need to be cleared as well Nov 22 16:50:28 none of which has anything to do with interrupts per se Nov 22 16:50:37 ha I see what you mean, true the pru core is not interrupted needs to poll for it Nov 22 16:51:06 exactly, which means it's not an interrupt... the key point of an interrupt is that it... interrupts Nov 22 16:51:47 indeed it requires more manual work Nov 22 16:51:57 I think TI added an interrupt mechanism to pru on some of their most recent SoCs, but I haven't looked into it Nov 22 16:52:43 that +16 is really confusing, but I'm getting used to it :-D Nov 22 16:53:28 yeah that +16 is a dumb mistake... on the older PRUSSv1 there were 32 software triggered events, 32-63, and you'd write the event number to r31 Nov 22 16:54:16 on PRUSSv2 aka PRU-ICSS the software triggered events became 16-31 but the r31 logic in PRU wasn't modified accordingly Nov 22 18:34:14 so if my board fails to boot with a cape on but boots with cape off Nov 22 18:34:20 could i debug with a serial cable Nov 22 18:34:47 when I try to power on with the cape I just get the power LED on constant but nothing else Nov 22 18:35:03 that's probably very bad Nov 22 18:35:13 i was hoping maybe to see something with the serial cable as it goes through boot process Nov 22 18:35:28 bad with the cape ? Nov 22 18:35:33 it doesn't sound like there is any boot process Nov 22 18:36:00 if I take the cape off it works so you think it is hard ware Nov 22 18:36:59 like, honestly you should not stick a cape onto a bbai unless it's been confirmed to be compatible Nov 22 18:37:55 supposedly it should work per the compatibility layer project Nov 22 18:37:57 same cape Nov 22 18:38:07 overlay appears correct Nov 22 18:38:11 on show pins Nov 22 18:38:29 "should work" .. as in, someone has tested it? Nov 22 18:38:44 like, the fact that you needed to do a patch suggests to me otherwise Nov 22 18:39:02 have you confirmed you did the patch correctly and didn't accidently short VDD_5V to SYS_5V ? Nov 22 18:39:18 I could I test Nov 22 18:39:25 I did the solder blob Nov 22 18:39:31 and cut the other side Nov 22 18:39:41 per the manual Nov 22 18:39:52 and measured it to confirm? Nov 22 18:40:10 I did not do that Nov 22 18:40:31 and of course first checked how much power the bbai can supply on SYS_5V and how much the caoe needs? Nov 22 18:40:53 given that the doc you linked seemed to imply it is substantial Nov 22 18:41:02 I did not do that either =( Nov 22 18:41:10 kinda of going on blind faith in lorforlinux Nov 22 18:42:16 how would I test the patch with a multi-meter Nov 22 18:43:38 measure resistance between VDD_5V and SYS_5V on P9, it should be very high (preferably outside the range of the multimeter) Nov 22 18:43:59 ok Nov 22 18:44:21 would continuity test work as well Nov 22 18:44:56 sure **** ENDING LOGGING AT Mon Nov 23 02:59:57 2020