**** BEGIN LOGGING AT Thu Jun 14 03:00:05 2018 Jun 14 10:02:28 ant_work: try without the -mno-thumb-interwork Jun 14 10:02:37 just in case to narrow it down Jun 14 10:03:03 for the void bulid I do not use it. Jun 14 10:05:59 hi, I have pestered in #gcc Jun 14 10:06:02 Prior to ARMv6, doubleword (LDRD/STRD) accesses to memory, where the address is not doubleword-aligned, Jun 14 10:06:14 are UNPREDICTABLE Jun 14 10:06:22 the instruction its faulting at is an LDRD (doubleword load), and the address given in the trap is only 4 byte aligned Jun 14 10:06:41 whatever compiled readdir is assuming some member of the DIR structure it gets passed is aligned to allow a LDRD instruction, and its not Jun 14 10:07:12 as I thought, is readdir 1d040: e1cc00d8 ldrd r0, [ip, #8] Jun 14 10:07:47 he asked me to recompile with debug and use gdbserver Jun 14 10:08:54 greguu, actually OE changed twice from binutils 2.2.8 to 2.29 and now 2.30 Jun 14 10:13:25 hm, is that offset caused by thumb or not ? Jun 14 10:20:17 good question...I have a wild guess.. the syscall Jun 14 10:20:29 the args passed to the syscall I mean Jun 14 10:22:20 it might be thumb, yes, but was always enabled in the past, even with older gcc. Binutils has changed, though Jun 14 10:23:10 if you still have a sharp eye at night, these are the logs and disassemble (w/out full debug) Jun 14 10:23:13 I'll post couple of logs, can somebody please confirm it is readdir.c causing alignment traps on armv5? Jun 14 10:23:13 https://pastebin.com/2X0Sjt9n Jun 14 10:23:13 smaps https://pastebin.com/ABrJie74 Jun 14 10:23:13 od of libc.so https://filebin.net/awzmx3eeraa91izk Jun 14 10:23:13 afais 1d040: e1cc00d8 ldrd r0, [ip, #8] Jun 14 10:23:15 thanks in advance Jun 14 14:19:22 hi greguu Jun 14 14:20:41 I've build myself an MTK debug cable, but unfortunately it doesn't give any output **** ENDING LOGGING AT Fri Jun 15 03:00:10 2018