**** BEGIN LOGGING AT Sat Apr 09 23:59:57 2005 Apr 10 04:36:48 hi there Apr 10 04:38:16 are you working on openjtag? I've seen there are no sources available. Apr 10 04:38:39 oh, wait, there are some :) Apr 10 04:39:50 I'm working on a free JTAG software too, and just discovered your stuff. Apr 10 15:52:48 re Apr 10 15:58:05 hi Apr 10 15:58:37 what area are you working on? Apr 10 16:08:17 Hi jacques! long time no talk to! Apr 10 16:10:17 yeah, I'm finally home Apr 10 16:12:41 Hey, sorry, no time right now. I'll be back in an hour, hope we can talk then. Apr 10 16:12:51 me too! Apr 10 17:29:21 jacques, everybody all moved? Apr 10 17:50:54 ka6sox.... Apr 10 17:51:00 hi there. Apr 10 17:52:00 So what I'm working on is a generic JTAG library that lets you move the TAP state machine and shift bits in and out, with a cable driver plugin interface. Apr 10 17:52:30 cable from serial/usb/parallel? Apr 10 17:52:38 Plus, there's a gdb stub interface, and debugger stub code for ARM7TDMI and MIPS. Apr 10 17:53:10 Right now, there are drivers for parallel and serial cables. Apr 10 17:53:27 cool...we are looking at Xscale as this is adjunct to the NSLU2-Linux project. Apr 10 17:53:52 But it's not a big deal making drivers, they don't have so much to do. Most ist abstracted in the JTAG base lib. Apr 10 17:54:25 is there a group doing this or just you? Apr 10 17:54:48 This is from a project called MITOUJTAG. Ever heard of it? Apr 10 17:55:10 no...do you have a url? Apr 10 17:56:14 Point is, the guy who started it, published a very early version under GPL, then abandoned it for commercial licenses and closed source. I've just picked up on the code, bringing it in shape for a release. Apr 10 17:57:05 ah...no money in GPL for him....just couldnt' see the model Apr 10 17:58:10 I needn't care about the money, Got some free time to work on it, and open source needs it. Do you do consulting based on it or plan to? Apr 10 17:59:55 I am a hardware guy who uses the BDI2000 unit and can't afford one for home. Apr 10 18:00:26 I would like to recreate something similar(but not maybe as feature rich) for use with gdb Apr 10 18:00:35 (a pod hardware device) Apr 10 18:01:11 and make it affordable for OpenSource embedded developers to be able to get boards going. Apr 10 18:01:41 Actually, that's just what I was planning to do Apr 10 18:02:25 So what kind of JTAG converter/cable do you envision? Apr 10 18:03:07 I was looking at using Xilinx S3 board but now I'm thinking about using a S3e board instead because it will have interfaces and memory Apr 10 18:03:28 Don't you think that's rather expensive? Apr 10 18:03:40 $149 Apr 10 18:03:45 (US) Apr 10 18:04:09 a BDI2000 is over $2000/arch Apr 10 18:04:47 What functionality do you have in your current code? Apr 10 18:05:10 basic programming is all I've been working on. Apr 10 18:05:25 Data uploading? Apr 10 18:05:28 (been a little distracted with work stuffs) Apr 10 18:05:29 yeah Apr 10 18:05:47 directly to Flash/RAM? Or via the processor? Apr 10 18:06:04 Extest/Intest, that is? Apr 10 18:06:22 I"ve been playing with the flash algorithms for StrataFlash Apr 10 18:06:50 (making the Processor lines wiggle) Apr 10 18:07:17 but I havent' uploaded that as I could brick a device if I get it wrong Apr 10 18:07:30 (my code is written in VHDL) Apr 10 18:07:54 Why do you use VHDL? Apr 10 18:09:27 because that is what the Xilinx S3 board is programmed in. Apr 10 18:10:00 WebKit does support Verilog, doesn't it? Apr 10 18:10:13 yes Apr 10 18:10:32 but the preferred language is VHDL for Xilinx parts. Apr 10 18:10:41 I see Apr 10 18:10:45 (according to the manufacturer. Apr 10 18:10:58 I think that Verilog is somewhat easier to program in. Apr 10 18:11:29 So what functionality do you envision for your device? In addition to programming a flash? Apr 10 18:14:41 memory mapping Apr 10 18:14:46 breakpoints Apr 10 18:14:59 gdb support Apr 10 18:15:21 sounds good Apr 10 18:15:32 boundry Scanning Apr 10 18:15:38 what do you mean with memory mapping? Apr 10 18:16:11 when a processor fails I want to be able to see the state of memory and download chunks of it for analysis. Apr 10 18:16:24 (process that is) Apr 10 18:16:31 oh, memory dumping Apr 10 18:16:37 mostly for kernel/driver debug) Apr 10 18:17:22 where are you from? Apr 10 18:17:30 Californai Apr 10 18:17:34 ia Apr 10 18:17:54 * JMunakra is from Hamburg, Germany Apr 10 18:18:06 cool. Apr 10 18:18:13 and who do you work for? Apr 10 18:18:21 myself. Apr 10 18:18:37 student? Apr 10 18:18:53 oh no...that was 25yrs ago... Apr 10 18:18:57 :) Apr 10 18:19:06 What's your product? Apr 10 18:19:21 my "day" job is actually in Analog Hi Power RF. Apr 10 18:19:41 hm, nice Apr 10 18:20:28 100watts to 105kilowatts Apr 10 18:21:42 I dabble in Supervisory,Control and Data Aquisition stuff too (well actually a lot more than dabble) Apr 10 18:21:46 what do you do there? Apr 10 18:28:01 Embedded Software Apr 10 18:28:55 So, I'm going to publish my code shortly, so you can have a look at it, and see whether it'd help you Apr 10 18:29:43 The good thing about it is the modularity, people can easily add a module (for processor/cable/whatever) and need not care about the other parts Apr 10 18:30:30 So if I write an Xscale debugger, I don't need to care about the cable/interface, I can just shift bits in and out the TAP controller. That's quite nice. Apr 10 18:31:02 OTOH, if I build a new, super fast cable, all the existing debuggers/software will be able to use it instantly Apr 10 18:31:07 as long as you have the bsdl file you are good to go. Apr 10 18:32:34 How many people are actively developing on your project? Apr 10 18:38:20 2 or 3 Apr 10 18:39:28 its actually 2:41am here and I realized I have a client meeting in a little more than 5hrs...so I had better get some sleep. Apr 10 18:39:41 but I hang here most of the time. Apr 10 18:39:57 and would like to continue this discussion. Apr 10 18:40:18 sure Apr 10 18:40:32 I'll be here Apr 10 18:41:17 all right..cya soon. Apr 10 18:41:29 bye **** ENDING LOGGING AT Sun Apr 10 23:59:57 2005