**** BEGIN LOGGING AT Mon Apr 18 23:59:56 2005 Apr 19 08:29:01 https://sourceforge.net/projects/jtagpack/ Apr 19 08:29:11 meine software Apr 19 08:29:17 my software :) Apr 19 08:51:54 <[g2]> JMunakra, thx Apr 19 11:09:16 https://sourceforge.net/projects/jtagpack/ Apr 19 11:09:20 my software :) Apr 19 11:35:26 Nice. I'll take a look. Apr 19 11:38:30 JMunakra: what are the difference pieces? Apr 19 11:39:17 look at the project homepage Apr 19 11:42:28 I am. Apr 19 11:42:38 there are three packages. What do they do? Apr 19 11:45:20 JMunakra: ? Apr 19 11:46:26 http://jtagpack.sourceforge.net/ Apr 19 11:46:30 do you see this page? Apr 19 11:46:49 No. I followed the other link. Apr 19 11:46:52 Looking now. Apr 19 11:46:57 which link? Apr 19 11:47:22 Oh, yeah. The summary page. Apr 19 11:49:11 Does the stub run on the target? Apr 19 11:49:27 no, currently everything runs on the host Apr 19 11:49:41 Interesting. Apr 19 11:50:16 one task would be moving parts of the lib to JTAG emulator hardware Apr 19 11:50:29 to speed things up Apr 19 11:50:59 Which has been the point of this channel... Apr 19 11:51:16 I'm just curious what you've already got running. Apr 19 11:53:34 I'm got a friend working on the bsdl parser. Apr 19 11:53:38 One thing that could be rather easily done is write a cable driver that sends commands to the emulator Apr 19 11:53:54 I don't know what you mean. what emulator? Apr 19 11:54:22 Hardware that does the bitshifting Apr 19 11:54:38 Frankly, I'm more that curious. I've been using the openwince code and not bee happy with the design. Apr 19 11:55:05 ...that would the the TAP, I believe. The emulator component is usually the interface box because it is 'emulating' the jtag protocol. Apr 19 11:56:19 <[g2]> beewoolie-away, so lets start to put an architecture in place Apr 19 11:56:31 <[g2]> and begin replacing the stuff piece by piece Apr 19 11:56:36 <[g2]> or creating it for the first time Apr 19 11:56:50 When I finish this milestone, within a few weeks now, I'll put some time to sorting all of this out. I'd really like to work with JTAG enough to know where the bottlenecks will be. Apr 19 11:56:55 [g2]: What do you mean? Apr 19 11:57:28 <[g2]> beewoolie-away, you mentioned that you have not been happy with the design of OpenWinCE Apr 19 11:58:04 <[g2]> I mean you could say OpenWinCE could be improved by xxxxx because of yyyy Apr 19 11:58:51 <[g2]> maybe we should just schedule a review of the OpenWinCE sw on some date and have an online design review Apr 19 11:59:39 you shouls also evaluate jelie Apr 19 11:59:51 Sounds OK. My beef with the openwince is that the interface is overly complex and there are no debug options to handle failures. Apr 19 11:59:52 should Apr 19 11:59:57 I agree. Apr 19 12:00:22 <[g2]> ok that sounds like a very reasonable statement Apr 19 12:00:35 We;ve been stalled for a couple of months because of an expected USB hardware piece. There isn't really a reason to wait on the SW since the dongle is just transport...unless we design something with an FPGA. Apr 19 12:00:48 I think it makes sense, though, to think of an FPGA as an accelerator. Apr 19 12:00:57 I would want to help out with the design review if you like Apr 19 12:01:06 Ultimately, my interest is in debug, not simple flash programming. Apr 19 12:01:13 <[g2]> nod. Apr 19 12:01:20 <[g2]> Both are important Apr 19 12:01:21 This sounds like something that should go on the wiki. Apr 19 12:01:27 <[g2]> exactly Apr 19 12:01:56 Simple, JMunakra is the only person to provide something tangible. We'd be stoopid to exclude you. Apr 19 12:02:13 <[g2]> *really stoopid* Apr 19 12:02:23 Catastrophically. Apr 19 12:02:57 JMunakra: where do you interface to the bsdl data? Apr 19 12:03:37 Well, my intent is to create a platform, not so much specific solutions. But of course, I want experts for specific architectures/applications to fill in the details... Apr 19 12:04:00 <[g2]> JMunakra, what are your goals for the platform and otherwise ? Apr 19 12:04:22 beewoolie: I'm not sure whether these are used currently Apr 19 12:05:19 g2: People should have the least possible trouble creating own interfaces (hardware) drivers, and same for debuggers/apps Apr 19 12:05:25 JMunakra: Where (or what) is Nahitafu Apr 19 12:06:00 <[g2]> JMunakra, I'd imagine we want a backend to GDB Apr 19 12:06:09 [g2]: there already is one. Apr 19 12:06:31 nahitech.com Apr 19 12:06:36 The trouble is, I believe, that the specific implementation of the GDB interface must be custom for each core. Or, at least, each family. Apr 19 12:06:43 the code isn't available from them anymore tho :) Apr 19 12:07:07 Japanese? Apr 19 12:07:12 yes Apr 19 12:08:03 <[g2]> beewoolie-away, are you familiar with the abatron devices at all ? Apr 19 12:08:12 Quite. Apr 19 12:08:13 bee: have a look at libjtagice. That's the core specific stuff. the jtagstub part is generic Apr 19 12:08:35 I'm seeing bsdl stuff in the core. Apr 19 12:10:09 The parser is n the libjtag. Apr 19 12:10:17 Check and see whether that's used. I think it uses devicedb.txt, which contains some compacted info from the bsdl file. Apr 19 12:11:46 Ah, Apr 19 12:12:12 bbl Apr 19 12:12:52 ttfn Apr 19 12:12:59 <[g2]> see you later Apr 19 12:13:15 back :) Apr 19 12:14:58 So, I realize that you just need a tool to do your JTAG stuff. I'm not sure how good openwince/jelie are, and how much trouble it is to extend it to your wishes, compared to doing same with jtagpack. Apr 19 12:15:44 Basically, you have to check whether the jtagpack architecture gives you a benefit (like easily switching the cable hardware, e.g) Apr 19 12:16:07 that will outweigh migrating and debugging Xscale tools to jtagpack Apr 19 12:41:02 JMunakra: I'll have to take a look. the first task would be to get it to interface to one of my existing boards. Apr 19 13:29:19 beewolie: You'd probably use a prnprt type interface. I tried it with a Xilinx Parallel Cable III, you need to check whether other interfaces (Wiggler et al) have the same pin assignment Apr 19 13:30:03 then I'd recommend trying some ARM7TDMI target, to verify everything works as expected (because that's what I'm using right now) Apr 19 13:34:06 hm, I checked my sources in to sourceforge cvs like three hours ago, and they still don't show up on the statistics/CVSWeb Apr 19 14:15:39 <[g2]> JMunakra, do you know of any realy cheap ARM7 targets ? Apr 19 14:18:43 http://www.olimex.com/dev/index.html Apr 19 14:19:43 the proto boards start at US$59 Apr 19 14:19:49 <[g2]> cool Apr 19 14:29:55 Gotta go. Talk to you tomorrow. Apr 19 14:40:55 thedj: So the timestamps are OK when you go directly to the HAL, and bad if you go through AUHAL? Apr 19 14:41:07 wrong window **** ENDING LOGGING AT Tue Apr 19 23:59:56 2005