**** BEGIN LOGGING AT Sun May 08 23:59:57 2005
May 09 19:39:53 <[g2]> beewoolie hey!
May 09 19:40:36 <beewoolie> Been gone for long
May 09 19:41:06 <[g2]> who me ?
May 09 19:43:19 <beewoolie> I haven't seen you online in a day or so.
May 09 19:46:40 <[g2]> nod. I was on a little, but I've been doing stuff
May 09 19:46:50 <beewoolie> Nice.
May 09 19:46:59 <beewoolie> Did you get a chance to send the diligent?
May 09 19:47:12 <[g2]> DOH!
May 09 19:47:28 <[g2]> First thing tomorrow! Promise
May 09 19:47:49 <[g2]> I'll send the e-mail with the conf number too
May 09 19:47:52 <beewoolie> np  :-)
May 09 19:52:45 <[g2]> ls
May 09 19:52:54 <beewoolie> ?
May 09 19:53:19 <[g2]> beewoolie, any luck with irq_handler ?
May 09 19:53:49 <beewoolie> Hmm.  I don't recall the issue.  Are you talking about the USB problem on the SLUG?
May 09 19:54:06 <[g2]> nod
May 09 19:54:47 <beewoolie> I'm not planning to work on it until I have JTAG.
May 09 19:55:07 <[g2]> ok.. So Wednesday morning then
May 09 19:56:24 <[g2]> beewoolie, what are you going to use on the other end ?
May 09 19:56:28 <[g2]> sw wise that is
May 09 19:57:17 <beewoolie> Hang on ... otp
May 09 20:08:52 <beewoolie> [g2]: k.
May 09 20:09:03 <[g2]> wb
May 09 20:09:14 <beewoolie> I'm planning to look more carefully at the CPU registers.
May 09 20:09:28 <beewoolie> I'll probably dump them and then look to see if there are any differences.
May 09 20:09:55 <beewoolie> The other tack is to look at the kernel to see why it doesn't think there is an ethernet controller...or USB controller, right?
May 09 20:09:55 <[g2]> sounds like a good plan, but what sw are you going to used to do that ?
May 09 20:10:14 <beewoolie> Redboot has routines for reading memory.
May 09 20:10:17 <beewoolie> APEX does too.
May 09 20:10:23 <[g2]> USB interrupt controller isn't in /proc/interrupts
May 09 20:10:42 <beewoolie> Actually, the kernel search is probably something useful, too.
May 09 20:11:37 <beewoolie> Really, that is a good place to look...and I don't need JTAG but I've been busy with cleanup...since it will tell us why the driver's don't attach to the interrupts.
May 09 20:11:39 <[g2]> did we verify the interrupt type for the GPIOs ?  Level verus edge  ?
May 09 20:12:07 <beewoolie> Don't know.  I am using the same setup...I think.
May 09 20:12:13 <beewoolie> Remember, that the avilla works.
May 09 20:12:27 <[g2]> well the GPIOs are a little different
May 09 20:12:37 <beewoolie> For the ethernet device?
May 09 20:13:10 <[g2]> dunno about the etherent, but I thought it'd be easier to track down the USB
May 09 20:13:23 <[g2]> as that's plain jane vanilla source
May 09 20:13:35 <beewoolie> Well, there should not be a difference between the ethernet interfaces on each of the known systems.
May 09 20:13:46 <beewoolie> A good idea, too.
May 09 20:15:03 <beewoolie> The first thing to do...for me...is to setup the build environment.
May 09 20:15:37 <[g2]> I've got 2 but I'm not shipping my new laptop to you
May 09 20:15:58 <beewoolie> :-)  I mean I need to add the nslu2 kernel to my build system.
May 09 20:16:27 <[g2]> You've got a slug right ?
May 09 20:16:33 <beewoolie> Yep.
May 09 20:16:34 <beewoolie> Two.
May 09 20:16:52 <[g2]> I've got a native compile environ that builds the kernel less the IXP drivers
May 09 20:17:01 <[g2]> just cause I haven't tried yet
May 09 20:17:21 <beewoolie> It shouldn't be hard.  I've worked through the touch bits already.
May 09 20:17:37 <beewoolie> It's in OE and should be easy to clone.
May 09 20:18:02 <[g2]> yeah... I fully agree... I just haven't focused on it at alll
May 09 20:18:22 <[g2]> but... If I sent you a flash stick with all that native stuff on there, then.....
May 09 20:18:24 <beewoolie> That's what I need to do the testing.
May 09 20:18:43 <[g2]> you'd just touch /.sda1root and reboot and be able to build the kernel
May 09 20:18:47 <beewoolie> I have all of the code.  It's just that I need to be able to rebuild the kernel.
May 09 20:19:00 <beewoolie> Ah, I don't really want to build on the slug.
May 09 20:19:02 <beewoolie> Too slow.
May 09 20:19:10 <beewoolie> My build tools work fine.
May 09 20:19:19 <[g2]> I'm not surprised
May 09 20:19:36 <beewoolie> :-)
May 09 20:19:55 <[g2]> do you know anything about the arriba guys ?
May 09 20:20:01 <beewoolie> Only from you.
May 09 20:20:44 <[g2]> http://www.viosoft.com/
May 09 20:21:20 <[g2]> one of there guys just wrote and interesting article in LinuxDevices
May 09 20:21:39 <beewoolie> I'll look it up.
May 09 20:21:48 <[g2]> http://www.linuxdevices.com/news/NS7546805052.html
May 09 20:21:54 <beewoolie> Frankly, I've never been interested in the IDEs.
May 09 20:22:08 <[g2]> no.. but the have debuggers
May 09 20:22:18 <[g2]> they
May 09 20:24:01 <beewoolie> RMK says debuggers are for weaklings.
May 09 20:24:15 <[g2]> and you want JTAG for ?
May 09 20:24:27 <[g2]> beewoolie is a weakling :)
May 09 20:24:27 <beewoolie> I didn't say I always agree with him.  :-)
May 09 20:24:39 <beewoolie> I have moments of weakness.
May 09 20:25:03 <beewoolie> Actually, I generally agree with him.  It is easy to lean on a debugger when there are better ways.
May 09 20:25:06 <[g2]> I'm glad... Otherwise you proabably would have never wandered in here :)
May 09 20:25:25 <[g2]> engineering is all about trade-offs
May 09 20:25:35 <beewoolie> the BDI2000 was crucial in finding a nasty kernel bug related to TLB flushing.
May 09 20:26:19 <beewoolie> I'll have to read the paper later.
May 09 20:26:44 <[g2]> Having a big tool bag helps
May 09 20:27:02 <[g2]> but it's important to know which tool goes with which job
May 09 20:27:23 <beewoolie> A sawzall can be a great thing.  Sometimes, tho, the tools aren't really necessary.
May 09 20:27:45 <beewoolie> GUI tools, as an example, often (and I mean that) make simple tasks more difficult.
May 09 20:28:04 <[g2]> nod.
May 09 20:28:12 <[g2]> Like adding 10K users
May 09 20:28:26 <[g2]> great from a script that reads from a file
May 09 20:28:28 <beewoolie> So, I'd pick upp another tool if I found that mine were lacking.
May 09 20:28:31 <beewoolie> nod.
May 09 20:28:33 <[g2]> miserable from a GUI
May 09 20:28:52 <[g2]> That's why the two should be interchangeable
May 09 20:29:04 <beewoolie> I have a pal who has used Perl to circumvent that particular Windows problem.
May 09 20:29:44 <[g2]> did I ever gloat about my Perl script and the logic analyzer ?
May 09 20:30:12 <beewoolie> No. sounds cool.
May 09 20:30:40 <[g2]> Yeah... A long time ago we were trying to improve performance on a product
May 09 20:31:15 <[g2]> there was a deep memory logic analyzer around that could actually capture 25ms realtime bus accesses
May 09 20:31:26 <beewoolie> Automation is such an important feature.
May 09 20:31:26 <[g2]> and had an ethernet interface on it
May 09 20:32:15 <[g2]> So I captured the data, expected the files over to a PC and ran a Perl script that used the symbol table map information to build histograms of execution
May 09 20:32:37 <[g2]> we got like at 10X performance improvement in like 3 days
May 09 20:32:49 <beewoolie> Wow.  I could use some of that.
May 09 20:33:14 <[g2]> because it was simple to see where the code was executing by routine name and even sub portions of routines
May 09 20:33:28 <beewoolie> Profiling.  Ah.
May 09 20:33:52 <beewoolie> I've been wondering if we could use JTAG for that, but I suspect not.
May 09 20:34:00 <[g2]> It was nice because it was totally non-instrsive
May 09 20:34:21 <beewoolie> Yep.
May 09 20:34:28 <[g2]> With an FPGA, I don't see why not
May 09 20:34:36 <beewoolie> Hmm.
May 09 20:34:45 <beewoolie> That's not something we've talked about.
May 09 20:34:48 <[g2]> it'd actually be just about perfect for the task
May 09 20:34:58 <beewoolie> There are some USB logic analyzers out there.  None are very fast.
May 09 20:35:19 <[g2]> there are some line rate ones for 900 and 2.5K
May 09 20:35:21 <[g2]> USD
May 09 20:35:41 <beewoolie> The ones' I've seen aren't really sufficient.
May 09 20:35:48 <[g2]> oh... you mean logic analyzers....
May 09 20:35:55 <beewoolie> I think it comes down to being able to cache the data.
May 09 20:35:57 <[g2]> not USB Bus analyzers...
May 09 20:36:11 <beewoolie> The throughput isn't there on the interfaces.
May 09 20:36:33 <[g2]> with the FPGA... You could halt the processor... go in snapshot some data... the restart and repeat no ?
May 09 20:36:56 <beewoolie> Do you know how to run the Tek 338?
May 09 20:37:11 <beewoolie> As long as there is enough room to store the data.
May 09 20:37:36 <[g2]> well that new S3e board has like 16MB SDRAM on it
May 09 20:37:45 <beewoolie> Let's see, 500MHz bus, 64 bit samples, ...
May 09 20:38:27 <beewoolie> Hmm.  
May 09 20:38:39 <[g2]> One thing I think these big ass FPGAs would be good for is something like that
May 09 20:38:40 <beewoolie> 4G.
May 09 20:38:50 <beewoolie> In one second.
May 09 20:39:01 <[g2]> 1st... They have the onboard Block RAM
May 09 20:39:04 <beewoolie> There's a reason that it's a hard task.
May 09 20:39:12 <[g2]> Second you could setup really wide memories
May 09 20:39:23 <[g2]> like 256 Bits wide or even 512
May 09 20:39:36 <beewoolie> I get it.
May 09 20:39:59 <beewoolie> The thing is that it would only be worthwhile if it could be conceived as something that would be able to progress.
May 09 20:40:07 <beewoolie> As the demands increased.
May 09 20:40:13 * beewoolie dreams
May 09 20:40:46 <[g2]> what do you mean progress as the demands increased ?
May 09 20:41:08 <beewoolie> I've got this 338.  It's capable of about 10MHz or something like it.
May 09 20:41:22 <beewoolie> Once the sampling rate is too low, the device is forfeit.
May 09 20:41:30 <beewoolie> slow that is.
May 09 20:41:36 <[g2]> nod.
May 09 20:42:02 <beewoolie> Thus, the key would be to make it capable of increasing the throughput as targets get faster.
May 09 20:42:06 <[g2]> The problem is it's more expensive to build the analyzers to keep up with the really fast buses
May 09 20:42:27 <[g2]> actually, I think you just replace devices every couple years
May 09 20:42:30 <beewoolie> I know.  It's a gnarly problem.
May 09 20:42:48 <beewoolie> How to make it possible reduce the cost of the upgrade.
May 09 20:42:59 <[g2]> that's easy
May 09 20:43:00 <beewoolie> Motherboards?  
May 09 20:43:15 <[g2]> no... just stay off the bleeding edge
May 09 20:43:37 <beewoolie> We're far from that with the slug.
May 09 20:43:48 <[g2]> I think sampling at 100Mhz effective (200 Mhz actual) is probably around the sweet spot maybe higher
May 09 20:44:31 <[g2]> actually, I'd like to see a USB 2.0 bus analyzer and a PCI 66Mhz/32 wide bus analyzer
May 09 20:44:44 <beewoolie> Hmm.
May 09 20:44:46 <[g2]> and 100Mbs and then 1000Mbs taps
May 09 20:44:53 * [g2] dreams
May 09 20:45:30 <[g2]> I can wait for the 1G tap
May 09 20:46:01 <[g2]> so back to reality
May 09 20:46:08 * beewoolie grins
May 09 20:46:17 <[g2]> What sw are you going to use with the digilent device ?
May 09 20:48:15 <beewoolie> openwince for the time being.
May 09 20:48:22 <beewoolie> Is there another?
May 09 20:49:07 <[g2]> openwince doesn't do debugging does it?
May 09 20:49:38 <[g2]> you've got serial on both the slugs right ?
May 09 20:50:30 <beewoolie> Ah, yeah.  One has a broken JTAG port.
May 09 20:50:57 <[g2]> that one has serial though right ?
May 09 20:51:01 <beewoolie> I can use GDB to do kernel debug, but I don't plan to use a debugger at all.
May 09 20:51:04 <beewoolie> Right.
May 09 20:51:17 <[g2]> and you are wait to flash APEX because ?
May 09 20:51:31 <[g2]> waiting
May 09 20:52:26 <[g2]> beewoolie tried to think up a good answer ....
May 09 20:52:47 <beewoolie> So that I can compare the hardware registers.
May 09 20:53:28 <beewoolie> I can do some of this without it, but I'm not going to write the bootloader without a working JTAG.
May 09 20:53:45 <beewoolie> I'm doing two things at once....
May 09 20:54:39 <[g2]> right... I think it makes total sense to write the bootloader with JTAG
May 09 20:55:19 <[g2]> however, I'd like to debug this kernel issue and I'm just being impatient
May 09 20:55:33 <beewoolie> I already had one white-knuckler when I corrupted the environment.
May 09 20:55:51 <beewoolie> I know.  I'm doing the cleanup work as we speak to move on to the next projects.
May 09 20:56:17 <beewoolie> I've just added the capability in my BSP builder to use CVS dates.  This should allow the build to be reproducible.
May 09 20:56:43 <[g2]> I've got a fixed snapshot on the laptop
May 09 20:57:05 <[g2]> I've got all the metadata and all the dl's on CDROM that go with it
May 09 20:58:01 <beewoolie> Is that supposed to help me?
May 09 20:58:16 <beewoolie> Remember, I know that what I have isn't as good as OE.
May 09 20:58:29 <beewoolie> Yet...
May 09 22:21:27 * dyoung his
May 09 22:21:30 <dyoung> hi's
May 09 22:24:14 <dyoung> bewoolie, I thought you had a JTAG cable all this time.
May 09 22:26:54 <dyoung> I'm still catching up the log, but there is a Xilinx Appnote for making a CR2 based Logic Analyzer.  I downloaded it but didnt read it yet.
May 09 22:39:21 <dyoung> http://direct.xilinx.com/bvdocs/appnotes/xapp368.pdf
May 09 22:39:47 <dyoung> It should be fairly easy to make a large channel device based on similar logic.
May 09 23:53:01 <beewoolie> dyoung: I'll check it out.
May 09 23:53:14 <beewoolie> And, no, I don't have a working JTAG inerface.
May 09 23:53:19 <beewoolie> interface.
May 09 23:53:52 <beewoolie> k6sox sent me a cable, but it was returned becase...wait for it...the zip code was wrong.
May 09 23:54:25 <beewoolie> Perhaps I'm way off bas here, but the USPO is supposed to use ZIP codes to 'help' them and not as a required portion of the address.
May 09 23:55:44 <ka6sox> and this time I'm *sure* it went to the right zipcode.
May 09 23:55:52 <ka6sox> so you should have it!
May 09 23:59:38 <dyoung> cool.
May 09 23:59:53 <dyoung> the USPS can bite me.
**** ENDING LOGGING AT Mon May 09 23:59:56 2005