**** BEGIN LOGGING AT Tue May 10 23:59:56 2005
May 11 12:17:14 <ep1220> [g2] The firmware is not in a file, either in EEPROM
May 11 12:17:25 <ep1220> or compiled into the driver or application
May 11 12:17:47 <[g2]> on the USB2 I think it's downloaded
May 11 12:18:04 <ep1220> But it is always possible to download a new firmware
May 11 12:18:06 <[g2]> in the USB-JTAG I think it's in an eeprom on onboard
May 11 12:18:15 <ep1220> even if it booted out of EEPROM
May 11 12:18:16 <[g2]> iirc eeprom
May 11 12:20:39 <ep1220> so I think it is possible to write a new firmware
May 11 12:20:57 <ep1220> I will get a Spartan3 board + USB in the next days
May 11 12:20:59 <[g2]> possibly
May 11 12:21:08 * [g2] hugs ep1220 
May 11 12:21:26 <ep1220> Will then verify this
May 11 12:21:37 <[g2]> are you getting a cable too ?
May 11 12:21:46 <ep1220> unfortunately not
May 11 12:21:58 <[g2]> ok
May 11 12:22:49 <ep1220> So YOu have such a cable ?
May 11 12:24:05 <[g2]> I don't but I was going to offer to get you one
May 11 12:24:25 <[g2]> having the S3 and usb shows much more initiative
May 11 12:24:40 <[g2]> and I don't want to distract you from the real task
May 11 12:25:26 <ep1220> To some degree I am not sure I want to spend time on the low-cost solution
May 11 12:26:21 <ep1220> Though it would be available sooner.
May 11 12:27:01 <ep1220> Which CPU do You want to debug ?
May 11 12:27:31 <[g2]> IXP4xx Xscale ARM
May 11 12:28:21 <[g2]> I don't have JTAG now and could use it for some debugging
May 11 12:28:21 <ep1220> See, Did some simulations. on the JTAG cable
May 11 12:28:23 <ep1220> I could get approx. 100KBytes/s download on XScale
May 11 12:29:04 <[g2]> downloader are really a big issue right now
May 11 12:29:35 <[g2]> the bootloader is running so I download to jffs2 @ 100Mhz via ethernet and reflash in seconds from Linux
May 11 12:30:08 <[g2]> however, for other boards and sucking stuff out of flash that be really sweet
May 11 12:31:01 <ep1220> Upload maybe a bit slower (due to the way XSCALE syncs to JTAG)
May 11 12:32:01 <ep1220> I have evaluated another 8051. It would be 4times faster.
May 11 12:32:22 <ep1220> But require a PCB an a commitment to say 100 boards
May 11 12:32:44 <ep1220> So I am not sure if there would enough takers ...
May 11 12:33:07 <ep1220> Then there is Spartan. Still faster, but a lot more work :-)
May 11 12:34:34 <[g2]> ep1220, couple questions
May 11 12:34:46 <ep1220> go on
May 11 12:35:09 <[g2]> what do you think the PCB would cost for 100 units ?
May 11 12:35:22 <[g2]> and could it also do JTAG
May 11 12:35:32 <[g2]> JTAG debugging
May 11 12:37:22 <ep1220> I have only quote for main parts so far. 50-80EUR (not sure about setup cost)
May 11 12:37:40 <ep1220> Yes primarily debugging.
May 11 12:38:06 <ep1220> actually and JTAG action You want
May 11 12:38:27 <[g2]> ok so .5-.8 EUR per board
May 11 12:38:51 <ep1220> i ment per board, incl. parts and manufacturing
May 11 12:39:14 <[g2]> that's even better :)
May 11 12:39:31 <[g2]> so that's like $180US for a run of 100 ?
May 11 12:40:29 <ep1220> 80EUR is approx. 110$
May 11 12:41:22 <[g2]> what do you want to do with the design and source code ? Is GPL ok ?
May 11 12:42:13 <ep1220> For debugging software, for sure.
May 11 12:42:23 <ep1220> For firmware not so sure.
May 11 12:42:41 <ep1220> Some processors i am interested in JTag info is under NDA
May 11 12:42:49 <ep1220> So GPL would be a problem here
May 11 12:43:17 <[g2]> you wouldn't have to release the sw for that processor
May 11 12:43:34 <[g2]> just release the sw for the IXP/Xscale
May 11 12:44:00 <[g2]> does that make sense ?
May 11 12:44:34 <ep1220> must think about it.
May 11 12:44:43 <[g2]> Wonderful.
May 11 12:44:54 <ep1220> In my plans BSD like license might also be possible.
May 11 12:44:55 <[g2]> Thanks so much for your time and help
May 11 12:45:25 <[g2]> BSD style license would likely work
May 11 12:47:05 <ep1220> on the Xilinx S3: are you an expert/advanced user/beginner ?
May 11 12:47:22 <[g2]> beginner
May 11 12:47:47 <[g2]> I'm an embedded firmware guy and I've worked right next to a bunch of high-end FPGA guys
May 11 12:48:18 <[g2]> So I'm familar with all the constraints and capabilities, but not from an actual make happen perspective
May 11 12:48:47 <[g2]> I have a decent understanding of floor-planning and routing constraints
May 11 12:48:50 <ep1220> the point: Using S3 + 68013 would add 20EUR parts cost - not so much, rigth (?)
May 11 12:49:16 <[g2]> not to me.
May 11 12:49:51 <ep1220> But i have a hard time estimating development time
May 11 12:50:26 <[g2]> well for the guys I know it'd be in the weeks range but they are experts
May 11 12:50:44 <[g2]> I've been toying with actually contracting with them to just do it
May 11 12:51:35 <ep1220> Did You ask them for a price ?
May 11 12:52:02 <[g2]> not yet. I've been asking to get it for free first :)
May 11 12:52:25 <ep1220> that price would be hard to beat ;-)
May 11 12:52:45 <[g2]> are you an FPGA guy ?
May 11 12:53:38 <ep1220> I worked with the first Xilinx available, arond '86/87, I believe.
May 11 12:53:48 <ep1220> Since then I only did smaller CPLDs.
May 11 12:54:08 <[g2]> so you are very well equiped for this taskk
May 11 12:54:10 <ep1220> Back than I had to manualy route/place 40% of the design
May 11 12:54:19 <ep1220> But then all CLBs were used :-)
May 11 12:55:21 <[g2]> on the last place where the hw guys were doing FGPA we had 1.5M parts... Routing on expensive PC was talking 16-20 hours :)
May 11 12:56:16 <ep1220> I was 2weeks on that job (on a 286; 800x600VGA)
May 11 12:56:29 <[g2]> :)
May 11 12:56:51 <[g2]> it's a great industry if you like change
May 11 12:56:57 <ep1220> Likely the Auto Routers have improved since then.
May 11 12:58:06 <[g2]> I've go to write something up.  I'll be back later tonight... Thanks for chatting !
May 11 12:58:37 <ep1220> Thank you too, I will be back tomorrow.
**** ENDING LOGGING AT Wed May 11 23:59:56 2005