**** BEGIN LOGGING AT Wed Sep 21 02:59:56 2005 Sep 21 07:49:45 hmm, anyone awake who could answer me a question about vhdl? i'm a bit confused about what really belongs into the process sensitivity list Sep 21 08:10:11 vmaster: the sensitivity list is equivalent to a "wait on {signals in the sensitivity list} " inserted just before the "end process" Sep 21 08:17:32 heh, yeah, that's what i read - but xst complains about a signal it doesn't have to wait for Sep 21 08:17:41 i have a "count-down" counter Sep 21 08:18:03 with asynch reset, asynch "load" and a parallel input Sep 21 08:18:54 i get a warning when the parallel input isn't in the sensitivity list Sep 21 08:19:09 ah Sep 21 08:19:10 ok Sep 21 08:19:12 forget about it Sep 21 08:19:35 i understood it right now Sep 21 08:20:52 the parallel input has to be in the sensitivity list, as the parallel data will be latched while the asynch load is true - therefor the process runs on any change of the parallel input, too **** ENDING LOGGING AT Thu Sep 22 02:59:56 2005