**** BEGIN LOGGING AT Thu Nov 03 02:59:58 2005 Nov 03 05:01:12 ep1220? there? Nov 03 05:01:28 hello Nov 03 05:03:57 I heard you made a jtag cable with the ft2232 Nov 03 05:03:59 ? Nov 03 05:04:11 yes. Nov 03 05:04:25 is it fast for ejtag ? Nov 03 05:04:49 good question :-) Nov 03 05:04:54 Because I tryed Nov 03 05:05:03 and it's even slower than a // cable Nov 03 05:05:42 Did You use for debugging or Flashing ? Nov 03 05:05:42 since there are someflags and everytime you send a ReadWrite, you have to wait for the answer Nov 03 05:05:47 Flashing Nov 03 05:06:14 latency is a problem for this cable Nov 03 05:06:32 I ended up putting my code in a Scenix 75Mips microcontroller Nov 03 05:06:46 and right now, for reading 64Kb, it takes me about 16s Nov 03 05:06:52 which is the same as the // port Nov 03 05:07:38 what is the JTAG clock rate you get with then Scenix ? Nov 03 05:08:19 s/then/the Nov 03 05:08:59 well the Scenix is a 75Mips proc Nov 03 05:09:15 If I don't put delay between the TCK, the broadcom doesn't even answer Nov 03 05:09:25 so I'm faster than the broadcom for that Nov 03 05:09:43 ok Nov 03 05:09:54 but the probleme is that the Scenix is a 8bit proc and I have to convert the instructions to 32Bit so it takes almost 4x more time Nov 03 05:10:57 can't You use the "delay" time to do some processing, so You hide the 32/8 conversion. Nov 03 05:14:53 i am not familiar with this uP: how does it connect to the PC ? USB ? Nov 03 05:18:19 usb Nov 03 05:18:30 it's like a Pic Microchip Nov 03 05:18:33 same arch Nov 03 05:20:01 brb Nov 03 05:20:12 k Nov 03 05:20:35 You do 64Kbyte in 16 seconds .i.e 4000bytes per second Nov 03 05:20:52 yeah Nov 03 05:20:55 = 1 32bit word per USB transfer -> maybe USB is limiting You here Nov 03 05:21:57 Do you handshake each 32bit word with the host PC ? Nov 03 05:22:11 no Nov 03 05:22:14 I get a frame Nov 03 05:22:19 but I found why it was so slow Nov 03 05:22:30 i am curious Nov 03 05:22:42 let's say I could bring it to 7s for 64kb Nov 03 05:22:47 would it be interesting ? Nov 03 05:24:05 hold on, I need to reboot Nov 03 05:24:19 unless you have a solution for when HyperTerminal is dead and you can't kill it Nov 03 05:24:40 brb Nov 03 05:24:44 sorry, never been there Nov 03 05:28:59 <[g2]> morning ep1220 Nov 03 05:29:11 morning [g2] Nov 03 05:29:21 <[g2]> how's the board ? Nov 03 05:29:46 sofar i am quite happy with it :-) Nov 03 05:30:01 <[g2]> great! Nov 03 05:30:15 i can do same things as with my earlier prototype. Nov 03 05:30:23 <[g2]> excellent Nov 03 05:30:34 <[g2]> when do they go up for sale ? Nov 03 05:30:45 Over the weekend i plan to build 3 more. Nov 03 05:31:20 if these work as well then i think i can sell some. Nov 03 05:31:37 <[g2]> super Nov 03 05:31:57 <[g2]> what will they cost ? Nov 03 05:32:26 i must check my invoices. Nov 03 05:32:46 <[g2]> you can send me an e-mail later after you check Nov 03 05:33:47 It also depends a bit on over how many boards I split the setup-cost. Nov 03 05:34:08 the partscost is in the order of 50$ Nov 03 05:34:23 (excluding PCB) Nov 03 05:35:00 <[g2]> hey I know you're not doing this to get rich immediately :) Nov 03 05:35:08 back Nov 03 05:35:19 ep1220: ok it takes me now about 8s to read 64k Nov 03 05:35:55 key2: a good improvement Nov 03 05:36:10 yeah Nov 03 05:36:12 but still too much Nov 03 05:36:29 I don;t wanna end up doing that with an FPGA since it's gonna cost more Nov 03 05:36:44 right now just with the ft2232 and sc, my cable costs about $15 Nov 03 05:36:46 which is ok Nov 03 05:36:56 <[g2]> last I checked a Scenix dev kit was _very_ expensive :) Nov 03 05:37:26 the ft2232C alone is around 15$ in small quantities Nov 03 05:37:38 [g2] http://www.parallax.com/detail.asp?product_id=SX28AC/SS Nov 03 05:37:44 ep1220: NO Nov 03 05:37:49 it's about $5 Nov 03 05:38:06 http://www.parallax.com/detail.asp?product_id=604-00033 Nov 03 05:38:10 ok $8 Nov 03 05:38:18 which is half of what you're announcing Nov 03 05:38:36 <[g2]> key2 have they released the dev kit's for the Scenix parts ? Nov 03 05:38:48 I already made one myself Nov 03 05:38:55 so I don't care about their dev kit Nov 03 05:39:01 the problem is not that Nov 03 05:39:20 the problem is that for reading EJTAG, it still takes too long even at 75Mips since it's a 8bit proc Nov 03 05:40:03 so I don't know if it's better to have a cable that can read 4Mb in about 10mins for $15 or 4Mb in about 40s for about $50 Nov 03 05:40:11 <[g2]> key2 so you built your own compiler/toolchains for the ubicom chip ? Nov 03 05:40:12 I need some opinion on htat Nov 03 05:40:31 g2: no, that's a Microchip PIC core Nov 03 05:40:44 so you can use the free one Nov 03 05:40:45 .. Nov 03 05:41:23 <[g2]> key2 so there was enough info in the DS to download to the chip and debug too ? Nov 03 05:41:25 [g2] otherwise C2C is free Nov 03 05:41:26 .. Nov 03 05:41:53 key2: You are right, last time i looked at the FTDI site i tought it was 8GBP Nov 03 05:42:24 <[g2]> time does fly when one is having fun :) Nov 03 05:42:46 but the question is what sould I make, a cable that costs $15 and that reads 4MB in about 10 15 mins or an otherone that costs $50 and reads 4Mb in about 40s Nov 03 05:44:06 <[g2]> key2 you do EJTAG ? Nov 03 05:44:13 yeah Nov 03 05:44:21 on JTAG i could read it way faster Nov 03 05:44:28 that's for EJTAG (broadcom mips) Nov 03 05:44:38 <[g2]> yeah. I know Nov 03 05:44:59 [g2] so $15 one or $50 one Nov 03 05:45:02 <[g2]> there's a large number of wrt54g hackers Nov 03 05:45:43 <[g2]> I've got a couple lying around Nov 03 05:46:50 key2: if the 15$ one is faster too, this is not hard to answer Nov 03 05:47:26 <[g2]> key2 are you focusing on EJTAG or JTAG ? Nov 03 05:54:42 key2: sorry, i misread Your numbers,: i read 4Mb in 10 seconds not 10 minutes ... Nov 03 06:27:41 yeah Nov 03 06:27:42 so ? Nov 03 06:27:47 what's the most interesting Nov 03 06:28:13 $15 and takes 15mins to read or $50 and it takes 40s Nov 03 06:28:45 for me the faster one would be worth the extra $ Nov 03 06:29:51 however if just wanted to unbrick a dead device i would buy the 15$ cable Nov 03 06:32:49 BTW: Are these prices for completely assembled devices ? Nov 03 15:37:20 anyone has some experiances with Verilog ? Nov 03 15:38:59 Verilog? whats that? *he he* Nov 03 15:39:47 ka6sox-office: it's vhdl for people who hate ada :) Nov 03 15:40:00 verilog looks more like C Nov 03 15:40:05 and vhdl looks more like ada Nov 03 15:40:23 key2: yup Nov 03 15:40:30 no wonder I like VHDL better. Nov 03 15:40:38 How comes Nov 03 15:40:44 ka6sox-office doesn't like C Nov 03 15:40:46 if you're more familiar with c Nov 03 15:40:54 i like C more than ada, but i still prefer vhdl Nov 03 15:41:01 why Nov 03 15:41:20 * ka6sox-office would probably be comfortable in ADA. Nov 03 15:41:32 key2: probably simply because i'm used to it Nov 03 15:41:40 ok Nov 03 15:41:45 maybe you could answer me Nov 03 15:41:56 if I have a port that is an Input output Nov 03 15:42:13 do I have to say that i wanna turn it into input mode or output mode ? Nov 03 15:42:34 or is it just considered as a wire and I have to manage to put the right thing behind to manage it Nov 03 15:43:12 key2: in vhdl, an inout port is a port that is an output, put you can still read the value that you wrote into it yourself Nov 03 15:43:25 key2: if you want to have a pin that can be both an input and an output, you want a tristate buffer Nov 03 15:43:33 key2: i dunno if verilog has builtin support for those... :-/ Nov 03 15:44:33 so basically, you put a tristate FF and with a ChipEnable pin Nov 03 15:44:41 and if you wanna write, u enable it Nov 03 15:44:51 otherwise you disable it so it's like the pin is in the air Nov 03 15:44:51 ? Nov 03 15:50:40 key2: if that's possible, yeah Nov 03 15:50:48 key2: maybe look in the docs that came with your synthesis tool Nov 03 15:50:54 key2: that should tell you what you can use Nov 03 15:51:03 key2: if you use the xilinx webpack, check out xst.pdf Nov 03 16:00:57 The inout port in Verilog is analogous to a bi-directional I/O pin on Nov 03 16:00:58 the device with the data flow for output versus input being Nov 03 16:00:58 controlled by the enable signal to the tristate buffer. Nov 03 16:01:26 okay Nov 03 16:01:28 sounds what you need then Nov 03 16:01:34 yeah Nov 03 16:01:43 so it's build in Nov 03 16:01:51 good to know Nov 03 16:03:10 but I dunno where is the wire saying it's OutEnable Nov 03 16:03:19 module EXAMPLE (A, B, C, D, E); Nov 03 16:03:19 input A, B, C; Nov 03 16:03:19 output D; Nov 03 16:03:19 inout E; Nov 03 16:03:19 wire D, E; Nov 03 16:03:20 ... Nov 03 16:03:22 assign E = oe ? A : 1’bz; Nov 03 16:03:25 assign D = B & E; Nov 03 16:03:26 ... Nov 03 16:03:28 endmodule Nov 03 16:03:39 in this example, where the hell did they declare oe Nov 03 16:04:45 dunno.. Nov 03 16:05:48 i got an otherone that seams to be clearer Nov 03 16:05:51 module test (a, oe, o); Nov 03 16:05:52 inout [2:0] a ; Nov 03 16:05:52 input [3:0] oe ; Nov 03 16:05:52 inout o ; Nov 03 16:05:52 wire bus; Nov 03 16:05:52 assign bus = oe[2] ? a[2] : 'bz; Nov 03 16:05:54 assign bus = oe[1] ? a[1] : 'bz; Nov 03 16:05:56 assign bus = oe[0] ? a[0] : 'bz; Nov 03 16:05:58 PULLUP i0 (.O(bus)); Nov 03 16:06:00 PULLUP i1 (.O(a[0])); Nov 03 16:06:02 assign o = oe[3] ? bus : 'bz; Nov 03 16:06:04 endmodule Nov 03 17:06:11 there is no channel on verilog ? Nov 03 20:47:59 jacques - ka6sox asked me to ask what emulator you're using ;) Nov 03 20:48:48 is ka6sox here? Nov 03 20:50:32 i'm in a room irl with him Nov 03 20:50:45 he's talking about slugs and debian and stuff - was on the phone so i misssed a bit Nov 03 20:51:28 aaaaah Nov 03 20:51:45 he asked me to be online because he'd have his talk Nov 03 20:51:54 cool Nov 03 20:52:05 so i set my alarm clock for 4am, and ka6sox isn't here! Nov 03 20:52:09 but he's still talking, that explains Nov 03 20:52:12 oops Nov 03 20:52:18 yeha, he's talking right now Nov 03 20:52:26 he said the talk would be between 4am and 4:20am, and then there'd be time for questions from the audience Nov 03 20:52:31 ok :) Nov 03 20:52:32 (4am and 4:20am my time) Nov 03 20:52:37 but since it's 5am now.. Nov 03 20:52:41 :) Nov 03 20:52:43 the talk's going long ;) Nov 03 20:52:54 ok, good then Nov 03 20:53:42 * lennert just fixed his DES core Nov 03 20:54:00 cool Nov 03 20:56:45 what's the emulator for arm that jacques has been running? Nov 03 20:56:53 (i think that's on my behalf, heh) Nov 03 20:58:17 hehe Nov 03 20:58:19 what kinds of build machines are you running? and tking wants to hear your take on the nfs story - and steph is asking about nbd Nov 03 20:58:32 steph's asking if you've had nbd crashes Nov 03 20:59:25 which version of nbd are you using? extended or in-kernel? Nov 03 21:01:14 hang on Nov 03 21:01:29 i'm using a radisys enp2611 card at home Nov 03 21:01:36 that's a PCI board with a 600mhz ixp2400 and 256M of ram Nov 03 21:01:47 niiice :) Nov 03 21:01:59 at the university, we have an intel ixdp2850, which is a dual 700mhz box, with 768M of triple-interleaved rambus ram per CPU Nov 03 21:02:07 (oh, and it has 10 gigabit interfaces too :) Nov 03 21:02:17 and two more enp2611 cards at the university Nov 03 21:02:20 wow Nov 03 21:02:30 'my take on the nfs story', how do you mean? Nov 03 21:02:35 (i haven't been following the talk) Nov 03 21:02:36 can you say fast? Nov 03 21:02:50 i'm using nbd that is in the standard kernel Nov 03 21:02:53 specifically swap-related Nov 03 21:02:56 i'm only using nbd for swap at this point Nov 03 21:03:09 256M is enough for most apps but some packages still run out of steam Nov 03 21:03:16 so i have 4G of swap activated over an nbd device Nov 03 21:03:18 like gcc Nov 03 21:03:27 it usually doesn't need it, but sometimes it does Nov 03 21:03:38 is it the extended nbd? Nov 03 21:03:41 man, what do those cards and that box cost? Nov 03 21:03:44 i've heard a lot about nbd deadlocks, but i haven't encountered them so far, perhaps because i'm not pushing hard enough Nov 03 21:03:51 dot: nope, the regular in-kernel one Nov 03 21:04:00 the radisys card is about $4k, the intel box was $30k or so? Nov 03 21:04:04 wow Nov 03 21:04:04 but it's devel hardware Nov 03 21:04:16 'retail' dual ixp2800 systems go for around $10 Nov 03 21:04:18 $10k Nov 03 21:04:26 still fairly specialised hardware Nov 03 21:04:28 yeah Nov 03 21:04:35 that rambus sounds expensive! Nov 03 21:05:01 i mean, you're supposed to be able to do 10 gigabit/second ipsec processing and deep packet classification with Nov 03 21:05:10 sweet Nov 03 21:05:11 (which is really what the boxes are made for) Nov 03 21:05:21 at my uni they do networking research with those boxes Nov 03 21:05:33 i just make sure there's userland stuff and that the kernel keeps running Nov 03 21:05:36 how much swap on the UNi boxes have you used. Nov 03 21:05:46 the uni boxes don't need swap Nov 03 21:05:57 we're all jaw-dropped about 10Gb ipsec Nov 03 21:05:57 (the ixdp has 768M per cpu, so 1.5G total) Nov 03 21:06:06 hehe Nov 03 21:06:28 the built-in ixp2800 crypto unit is nice Nov 03 21:06:34 :) Nov 03 21:06:40 btw, no, i haven't had nbd crashes Nov 03 21:06:43 cool Nov 03 21:06:46 but i haven't really been pushing it Nov 03 21:07:02 any other questions? Nov 03 21:07:16 not at the moment Nov 03 21:07:21 but hang on :) Nov 03 21:07:26 tom's talking about the role of the ixp's Nov 03 21:07:30 okay Nov 03 21:08:55 how much swap on the small boxes? Nov 03 21:09:20 i've configured all enp2611s with 4G swap-over-nbd Nov 03 21:09:26 just to be on the safe side Nov 03 21:11:58 how much have you seen used? Nov 03 21:12:19 during gcc build, ~300M-ish Nov 03 21:12:28 but that has one big linking step Nov 03 21:12:42 w00t Nov 03 21:12:43 cool Nov 03 21:12:46 w00t?: Nov 03 21:12:57 dyoung-web: ka6sox is doing his talk Nov 03 21:13:12 yeah, tahts what I'm w00ting about. :-) Nov 03 21:13:22 oh :) Nov 03 21:13:38 dyoung-web: you're not there, are you? Nov 03 21:13:52 ixp's for everyday living! Nov 03 21:14:02 no' I'm like a few thousand miles away. Nov 03 21:14:24 dyoung-web: but you're following the talk somehow? Nov 03 21:15:11 time to pack up Nov 03 21:15:22 5:15am Nov 03 21:15:41 thanks for coming...we had a good turnout Nov 03 21:15:50 you're welcome! Nov 03 21:15:57 and the questions I asked earlier were quite helpful Nov 03 21:16:03 good to hear Nov 03 21:16:09 spread the Debian love :) Nov 03 21:16:40 indeed :) Nov 03 21:17:05 and i managed to find a key schedule bug in my des core Nov 03 21:17:13 oops Nov 03 21:17:26 (i knew it was hiding in there somewhere, just didn't know where) Nov 03 21:17:39 so this period of being awake at 4am was productive for me too Nov 03 21:17:41 :) Nov 03 21:17:45 great to hear it went well Nov 03 21:17:54 any more questions before i go horizontal? Nov 03 21:18:03 lennert, I've been following the talk through telepahty. Nov 03 21:18:09 dyoung-web: ah! Nov 03 21:18:13 I think that you answered all of them. Nov 03 21:18:15 That and reading interjections by cbpage earlier. Nov 03 21:18:31 dot: cool Nov 03 21:18:45 I wish I could download lennerts brain. Nov 03 21:19:03 * lennert points dyoung-web to http://svn.wantstofly.org/vhdl/ Nov 03 21:19:03 DES. Nov 03 21:19:09 oooh.... Nov 03 21:19:09 w00t Nov 03 21:19:35 Wow, Looks like I need to setup svn someday too eh Nov 03 21:19:51 dyoung's local repo Nov 03 21:20:00 me too Nov 03 21:20:01 :) Nov 03 21:20:01 i keep most of my projects in svn repos Nov 03 21:20:16 change tracking, even if it's just for yourself, is so darn useful Nov 03 21:20:40 Yeah, thats what i want. Nov 03 21:20:44 and need. Nov 03 21:20:58 I have a personal cvs right now; but its being a pita Nov 03 21:22:13 dyoung-web: will you be around tonight? Nov 03 21:22:15 http://svn.wantstofly.org/uengine/ is my ixp2000 microengine stuff Nov 03 21:22:33 and i have an svn tree somewhere for ivykis, but that's not in a public place (yet) Nov 03 21:22:46 can I anonymous svn co from you Nov 03 21:22:46 ? Nov 03 21:22:49 I have to pick up marina Nov 03 21:22:56 cya in a bit ;) Nov 03 21:22:59 dot: ciao :) Nov 03 21:23:01 dot: I'll be around later. Nov 03 21:23:06 but like LATER later. Nov 03 21:23:08 dyoung-web: should be, but maybe apache doesn't have enough permissions Nov 03 21:23:22 dyoung-web: so by all means, try, and if it doesn't work, complain :) Nov 03 21:23:27 okie Nov 03 21:23:59 dyoung-web: btw, i have access to a http://www.xilinx.com/products/boards/ml310/current/ now Nov 03 21:24:17 Wow Nov 03 21:24:19 Thats a big board Nov 03 21:24:36 yeah Nov 03 21:24:38 atx form factor Nov 03 21:24:47 i'll be trying to get linux working on it Nov 03 21:24:54 It looks expensive. Nov 03 21:25:02 Linux using the PPC ? Nov 03 21:25:04 if xilinx's "IP" is not free enough i might end up writing a pci core and a dram controller and stuff Nov 03 21:25:08 yeah Nov 03 21:25:17 theres a mailing list for that someplace. Nov 03 21:25:23 I dotn know if offhand... Nov 03 21:25:29 thanks lennert and dyoung-web Nov 03 21:25:31 linux on ppc, or linux on ppc on virtex? Nov 03 21:25:33 dot: okay! Nov 03 21:25:37 I only know the microblaze one... Nov 03 21:25:44 dot: go fetch your wife ;) Nov 03 21:25:46 linux on ppc on viertex. Nov 03 21:25:53 dyoung-web: microblaze would in fact be good to reimplement Freely Nov 03 21:26:16 you know about opencores right? Nov 03 21:26:19 yeah Nov 03 21:26:23 ok. Nov 03 21:26:27 Just making sure. Nov 03 21:26:41 the vhdl counterpart of the crapheap that is sourceforge Nov 03 21:26:51 there's some really good stuff there.. Nov 03 21:26:57 ..and some excruciatingly bad stuff. Nov 03 21:26:58 Yeah, its pretty educational. Nov 03 21:27:07 (just like sourceforge) Nov 03 21:27:20 yeah, it always helps to read a lot of code. Nov 03 21:27:27 that's basically how i learned vhdl Nov 03 21:27:40 Hmm, I didnt get around to my assignment yet. Nov 03 21:27:42 i'm still not sure about 80% of the constructs, and what does exactly what. Nov 03 21:27:55 hehe Nov 03 21:28:02 maybe thats why I'm not a VHDL haX0R Nov 03 21:28:23 it's the 'holy grail' attitude Nov 03 21:28:31 you build a castle, which sinks into the swamp Nov 03 21:28:38 then you build another one, and that sinks into the swamp also Nov 03 21:28:41 then a third one, etc. Nov 03 21:28:55 what happens when the swamp gets full. Nov 03 21:28:55 and eventually you'll end up with a good one Nov 03 21:29:01 heh Nov 03 21:29:03 Yeah. Nov 03 21:29:10 but the thought of stuff sinking into the swamp doesn't stop you from trying. Nov 03 21:29:23 i read vhdl i wrote a month ago and i think "jeeeeeeeeezzz..." Nov 03 21:30:18 anyway Nov 03 21:30:25 dyoung-web: feel free to look around in the svn repo Nov 03 21:30:33 I will. :-) Nov 03 21:30:37 dyoung-web: and feel free to rip off stuff :) Nov 03 21:30:43 I will :-) Nov 03 21:30:50 dyoung-web: (extra points for plagiarism :) Nov 03 21:30:54 har har Nov 03 21:31:01 "Hey, that stanza looks famliar...." Nov 03 21:31:16 everything in vhdl looks familiar, there are only 5 or so basic constructs that you use Nov 03 21:32:11 (either that or i'm really crap :) Nov 03 21:32:42 what i just mean is, even if you just copy code somewhere else, it still gives you more exposure, and exposure is basically the only thing that matters in advancing yourself Nov 03 21:32:53 Yep., Nov 03 21:32:55 doesn't matter much how you get exposed to it, really Nov 03 21:32:55 I agree. Nov 03 21:33:27 okay, so, i'm off Nov 03 21:33:35 nite all Nov 03 21:33:35 ok have a great.. morning ! Nov 03 21:33:42 thanks :) Nov 03 22:36:25 anyone has some knowledge on verilog ? Nov 03 23:32:06 morning Nov 03 23:38:44 ka6sox-away: hi Nov 03 23:39:10 ka6sox-away: Ibb in 20 minutes Nov 03 23:39:13 hi there... Nov 03 23:39:15 cya then. Nov 03 23:51:49 cool re the pong Nov 03 23:56:10 lennert is cranking it out! Nov 03 23:56:36 I'm impatiently awaiting the s3e board. Nov 04 00:02:18 ka6sox-away: back Nov 04 00:07:08 ep1220, wb Nov 04 00:07:20 sorry I was off reading vhdl. Nov 04 00:07:27 np Nov 04 00:07:47 just reading yesterdays archive of this channel Nov 04 00:08:02 nice to have the logs. Nov 04 00:08:08 agree Nov 04 00:08:50 do you play with FPGA/CPLD's? Nov 04 00:09:10 not that much Nov 04 00:09:24 looked into the spartans for JTAG some time ago Nov 04 00:10:10 I'm playing with my S3 board and looking into using that for handling speedup. Nov 04 00:10:24 i too have the S3 board Nov 04 00:10:38 the Digilent one? Nov 04 00:10:43 yes Nov 04 00:10:57 good then 5 of us on channel have it. Nov 04 00:11:08 I still think that is the best "engine" that we could use. Nov 04 00:11:24 i saw you guys have caught FPGA fever :-) Nov 04 00:11:32 yes. Nov 04 00:11:35 :) Nov 04 00:11:58 cbpage_, is about 10kms from me. Nov 04 00:12:43 Ah, in the US this is neighbours, right :-) Nov 04 00:13:08 yes...we met tonight. Nov 04 00:13:50 great Nov 04 00:14:00 I need to setup the subversion server tommorrow so that we can start sharing code. Nov 04 00:14:22 k Nov 04 00:14:51 i'll package up what i have and mail to You Nov 04 00:14:59 thanks Nov 04 00:15:35 IIRC vmaster said the latest Linux FTD2x driver now works OK Nov 04 00:16:44 that should help Nov 04 00:17:02 i use that driver on Win as well, so we could give it a try on linux too Nov 04 00:17:02 the S3E board might be nice for BDM type applications. Nov 04 00:17:40 with BDM You refer to Motorola debug IF ? Nov 04 00:17:47 yes. Nov 04 00:18:06 we use an abatron but that is very expensive. Nov 04 00:18:42 i know these, but they are also fast Nov 04 00:18:48 very fast Nov 04 00:19:01 Do you know the Windriver USB probe ? Nov 04 00:19:10 yes Nov 04 00:19:35 also fast, but still more expensve than the abatron Nov 04 00:19:38 I would love to make a system for a lot less than the Abatron which would simulate. Nov 04 00:19:52 (or have a lot of the same functions. Nov 04 00:19:53 Yu mean simulate an Abatron ? Nov 04 00:19:56 yes Nov 04 00:20:10 we use it for developing on PPC. Nov 04 00:20:17 IIRC Abtron is on ethernet (?) Nov 04 00:20:21 yes Nov 04 00:21:14 they also load target-specifc modules onto the probe -i guess Nov 04 00:21:26 yes...expensive too. Nov 04 00:21:38 very nice box. Nov 04 00:21:46 basically getting this performance at a lower price is my goal too Nov 04 00:22:09 i am confident that an S3 can do it. Nov 04 00:22:15 I agree. Nov 04 00:22:30 okay looks like we have a common goal. Nov 04 00:22:43 this is why I started this project. Nov 04 00:22:54 however my calculations showed that is hardly possible under 200USD Nov 04 00:23:10 abatron is more like $2000 Nov 04 00:23:24 so anything under $300 would be much joy for me. Nov 04 00:23:27 and if you have to pay for the needed SW you come a lot closer to these $2000 Nov 04 00:23:41 i.e pay people to code Nov 04 00:23:48 I figure to use some form of gdb Nov 04 00:23:58 gdb is not all Nov 04 00:24:04 true. Nov 04 00:24:14 Yu need debugginfg stubs to run on the probe and the target CPU Nov 04 00:24:20 and You need to test these. Nov 04 00:24:29 long term goal :) Nov 04 00:24:48 to me it is not much worth to safe 1700$ and then waste days/weeks on debugging my debugger :-) Nov 04 00:25:11 true...but at least some functionality would be good. Nov 04 00:25:19 not everything may work 100% Nov 04 00:25:34 but programming at better speed would be good. Nov 04 00:25:40 and also some debugging. Nov 04 00:26:48 tommorrow I will have time (some) to play with the board. today I was busy on work stuffs :( Nov 04 00:27:00 this is why i did the FTDI. Nov 04 00:27:36 i hope it is fast enough to attract users and coders Nov 04 00:27:43 I think it will. Nov 04 00:28:03 the 2232 is a good chip to use. Nov 04 00:28:46 they just should have addes a uP-core ;-) Nov 04 00:28:50 added Nov 04 00:28:56 ya Nov 04 00:29:12 the uP interface of the 2232 is interesting to me. Nov 04 00:29:31 with a CPLD or FPGA it would make a nice interface. Nov 04 00:30:14 yes. Nov 04 00:30:50 i was also looking into chips with onboard Ethernet but all were too slow Nov 04 00:31:16 that is why I think that the FPGA is the solution. Nov 04 00:31:39 the S3e board might give us what we need to finish this (at a reasonable price) Nov 04 00:31:56 but we can start developing with the S3 board. Nov 04 00:32:38 agree. Nov 04 00:33:25 for the 5V IF: I thought about using a LVC125 Nov 04 00:33:48 I've used them too...(on a CPLD project i'm doing now) Nov 04 00:34:07 there are 4 gates and I have 4 inputs .. Nov 04 00:34:20 that should work nicely and cheap too. Nov 04 00:34:43 2 of my inputs actually are in/out. Nov 04 00:35:14 i can add a jumper to disable 2 of th 125 gates, so we would not loose output functionality Nov 04 00:35:26 yes. Nov 04 00:36:00 and there would be no speed issues as with an open-drain Nov 04 00:36:27 '125s should be plenty fast. Nov 04 00:36:42 yep Nov 04 00:37:13 soic14 is not hard to solder, too Nov 04 00:37:35 okay what do you think about putting the adapter boards attached to the JTAG-F? Nov 04 00:37:44 and then using cables? Nov 04 00:38:04 the 5V yes. Nov 04 00:38:11 k Nov 04 00:38:31 for the others i favour having the 20pin cable and the adaptor close to the target. Nov 04 00:38:40 k Nov 04 00:38:46 however the layout is so You can use them other way. Nov 04 00:38:55 nice. Nov 04 00:39:14 either install a right-angle receptacle (to plug directly into the Jtag-F) Nov 04 00:39:37 or a straight or rA header for an IDC connector. Nov 04 00:40:06 either one would work well. Nov 04 00:40:23 at 6MHz yes, Nov 04 00:40:43 signal is not going to jump off the wire. Nov 04 00:40:55 too short. Nov 04 00:41:07 in the 40-100MHz range I see people moving to impedance-controlled connectors Nov 04 00:41:18 so i guess some found problems there Nov 04 00:41:24 yes. Nov 04 00:41:42 I have seen plenty of problems with unterminated connectors. Nov 04 00:43:48 time for me to sleep. Nov 04 00:44:00 I'll be up in about 7hrs. Nov 04 00:44:01 and for me to do some work ;-) Nov 04 00:44:03 good night Nov 04 00:44:11 cya later... Nov 04 00:44:14 thanks Nov 04 00:44:25 i thank You Nov 04 00:44:38 anytime. Nov 04 00:44:48 ~weather klft Nov 04 00:44:52 Lafayette, Lafayette Regional Airport, LA, United States; (KLFT) 30-12-08N 091-59-35W 11M; last updated: 2005.11.04 0653 UTC; Dew Point: 59.0 F (15.0 C); Pressure (altimeter): 30.11 in. Hg (1019 hPa); Relative Humidity: 86%; Sky conditions: clear; Temperature: 63.0 F (17.2 C); Visibility: 6 mile(s); Weather: Mist; Wind: from the SSE (150 degrees) at 7 MPH (6 KT) Nov 04 00:45:25 ~weather klft Nov 04 00:45:28 Lafayette, Lafayette Regional Airport, LA, United States; (KLFT) 30-12-08N 091-59-35W 11M; last updated: 2005.11.04 0653 UTC; Dew Point: 59.0 F (15.0 C); Pressure (altimeter): 30.11 in. Hg (1019 hPa); Relative Humidity: 86%; Sky conditions: clear; Temperature: 63.0 F (17.2 C); Visibility: 6 mile(s); Weather: Mist; Wind: from the SSE (150 degrees) at 7 MPH (6 KT) Nov 04 00:45:43 ~weather ksba Nov 04 00:45:43 cool Nov 04 00:45:55 Something failed in connecting to the NOAA web server. Try again later. Nov 04 00:46:01 :-( Nov 04 00:46:03 ~weather ksba Nov 04 00:46:07 Santa Barbara, Santa Barbara Municipal Airport, CA, United States; (KSBA) 34-25-34N 119-50-37W 3M; last updated: 2005.11.04 0653 UTC; Dew Point: 43.0 F (6.1 C); Pressure (altimeter): 30.07 in. Hg (1018 hPa); Relative Humidity: 76%; Sky conditions: clear; Temperature: 50.0 F (10.0 C); Visibility: 10 mile(s); Wind: Variable at 3 MPH (3 KT) Nov 04 00:46:23 purl, please join #debonaras Nov 04 00:46:25 no fog tongiht! Nov 04 00:46:56 purl, do you even know what debonaras is? Nov 04 00:47:01 nope Nov 04 00:47:11 ~status Nov 04 00:47:12 Since Tue Nov 1 20:44:51 2005, there have been 22 modifications, 229 questions, 0 dunnos, 0 morons and 234 commands. I have been awake for 2d 11h 2m 47s this session, and currently reference 0 factoids. I'm using about 19580 kB of memory. With 0 active forks. Process time user/system 6374.11/358.02 child 0.04/0.01 Nov 04 00:47:42 ~slugtime Nov 04 00:47:44 rumour has it, slugtime is 40 hour days 10 hours in 4 timezones with overlap Nov 04 00:47:57 ~jacques Nov 04 00:47:58 from memory, jacques is running rxvt quite well on the tux, tho it requires a bit of mucking with ptys, or the master of NWS station codes Nov 04 00:48:06 that's from 2002 Nov 04 00:48:11 good memory Nov 04 00:48:19 ~softgun Nov 04 00:48:47 thats a big fat DUNNO Nov 04 00:48:58 time for me to sleep...catch you later. Nov 04 00:49:28 later ka6sox-zzzz **** ENDING LOGGING AT Fri Nov 04 02:59:56 2005