**** BEGIN LOGGING AT Sun Nov 27 02:59:57 2005 Nov 27 10:26:39 ka6sox: around? Nov 27 10:27:07 no...I'm square Nov 27 10:27:19 :) Nov 27 10:27:28 g'day lenner Nov 27 10:27:29 t Nov 27 10:27:32 wazzup? Nov 27 10:27:33 good day ka6sox Nov 27 10:27:36 vhdl trouble :) Nov 27 10:27:42 or actually, the vhdl is okay Nov 27 10:27:57 but.... Nov 27 10:28:15 i made an uart Nov 27 10:28:25 and i hook up the uart so that it loops back data from the pc back to the pc Nov 27 10:28:49 ..but it loses every 660th character :D Nov 27 10:29:14 my pc is probably using a slightly faster 1.8432MHz clock than my spartan3 board is, right? Nov 27 10:30:17 Its usually a case of not staying in the middle of the sampling cycle. Nov 27 10:30:33 what is your oversample rate? Nov 27 10:30:35 (sorry, 554th. a 553-byte burst comes back as 553, a 554-byte burst comes back as 553 bytes.) Nov 27 10:30:38 ka6sox: 16 Nov 27 10:30:50 sample at 7th bit time Nov 27 10:31:04 you aren't looking for an edge? Nov 27 10:31:09 i do Nov 27 10:31:19 maybe you want to have a look at the vhdl? Nov 27 10:31:24 url to code? Nov 27 10:31:26 http://svn.wantstofly.org/vhdl/uart/ Nov 27 10:31:54 i _think_ i have the sampling okay Nov 27 10:32:01 but i didn't fully walk it through yet Nov 27 10:32:08 'uart' Nov 27 10:32:24 i'm not seeing any framing errors Nov 27 10:32:56 in the receiver i have a check "has the receive register been emptied yet?", and i see that trigger Nov 27 10:33:18 the rx filter is a simple 2-bit up/down counter for filtering out single-bit errors Nov 27 10:34:28 (i added http://www.wantstofly.org/~buytenh/overrun-framing and i see 'overrun' toggle every 554th byte) Nov 27 10:36:14 lemme look at that. Nov 27 10:38:05 (the interface is clockless: the receiver toggles 'request' when a byte has been received, and whenever is connected to the receiver is supposed to toggle 'acknowledge' when it has received the byte) Nov 27 10:47:35 ka6sox: if i tell the transmitter to make the start bit 15 bit times long instead of 16 bit times long, i receive all characters.. Nov 27 10:48:38 then it *is* a framing error.... Nov 27 10:48:52 ? Nov 27 10:49:08 i'm merely speeding up the transmitter Nov 27 10:49:16 i have pc -> sp3 receiver -> sp3 transmitter -> pc Nov 27 10:49:17 wait... Nov 27 10:49:29 the sp3 receiver -> sp3 transmitter is where characters get lost (i assume) Nov 27 10:49:31 is this in your TX code or RX code? Nov 27 10:49:57 i'm speeding up the sp3 transmitter by making each byte 1 bit time shorter Nov 27 10:50:13 ka6sox: this hack, in the tx code Nov 27 10:51:53 so its 15bit times long instead of 16bit times long. Nov 27 10:52:04 the start bit, yes Nov 27 10:52:15 overall, the transmitted byte is 159 bit times long Nov 27 10:52:25 and i don't lose characters anymore Nov 27 10:52:25 just the start bit...okay drawing the timing diagram. Nov 27 10:52:39 if i make the transmitted byte 160 bit times long, i do lose every 554th character Nov 27 10:52:51 this would go away if you made a small fifo Nov 27 10:53:20 i think the pc's 1.8432MHz is 1 in 90000 parts faster than the sp3 1.8432MHz Nov 27 10:53:27 yep Nov 27 10:53:28 so i think if i made a fifo it would also overflow Nov 27 10:53:38 (because i'm just flooding it with characters) Nov 27 10:54:09 (specifically, i'm looping vmlinuz through it :) Nov 27 10:54:11 the worst case scenario is 3 bytes Nov 27 10:54:35 the sp3 board doesn't have the hw flow control signals hooked up :-/ Nov 27 10:54:36 mostly you would see the buffer only get 2 deep. Nov 27 10:55:24 ok, let me try that Nov 27 10:55:26 when the stop bit is received you transfer the data to the fifo. Nov 27 10:55:41 that's kind-of what i do now Nov 27 10:55:51 i check if the stop bit is 1, otherwise i flag a framing error Nov 27 10:56:02 but you need to implement the fifo eles you get an overrun. Nov 27 10:56:17 er else Nov 27 10:56:26 well Nov 27 10:56:39 if the pc transmits faster than the sp3, i'll always get overruns, right? Nov 27 10:56:45 yesw Nov 27 10:56:58 it will shift the problem out further but yes. Nov 27 10:57:07 okay Nov 27 10:57:10 thanks for your help Nov 27 10:57:20 other than this, the serial rx/tx is working pretty nicely Nov 27 10:57:31 loopback is the worst case Nov 27 10:57:37 yeah Nov 27 10:57:49 so any other usage would be much faster. Nov 27 10:57:51 whee Nov 27 10:57:52 f9e4fe4bc084953815650726c30e053a /boot/vmlinuz-2.6.13-1.1526_FC4smp Nov 27 10:57:52 f9e4fe4bc084953815650726c30e053a looped-back Nov 27 10:58:53 i think i have all the pieces i need for my vt100 emulator now.. woot :) Nov 27 11:10:38 excellent Nov 27 13:17:31 receiver + transmitter fit nicely in 34 slices Nov 27 14:06:07 if i write "dest <= a xor ((b and c) or ((not b) and d));" i don't see why xst wouldn't use a LUT4 for the job.. **** ENDING LOGGING AT Sun Nov 27 17:47:44 2005 **** BEGIN LOGGING AT Sun Nov 27 17:48:12 2005 **** BEGIN LOGGING AT Mon Nov 28 01:23:51 2005 **** BEGIN LOGGING AT Mon Nov 28 01:29:30 2005 **** ENDING LOGGING AT Mon Nov 28 02:59:57 2005