**** BEGIN LOGGING AT Wed Nov 30 02:59:56 2005
Nov 30 14:24:53 <[g2]> ep1220 ping
Nov 30 14:26:34 <ep1220> [g2]: hello
Nov 30 14:28:00 <[g2]> hey ep1220 
Nov 30 14:28:12 <[g2]> how goes ?
Nov 30 14:28:16 <[g2]> how 
Nov 30 14:28:25 <[g2]> how's that little board of yours ?
Nov 30 14:28:37 <ep1220> works fine.
Nov 30 14:28:44 <ep1220> in the meantime i have 3 more 
Nov 30 14:29:05 <[g2]> what do they cost ?
Nov 30 14:29:59 <ep1220> my cost was a few cent below 60EUR (approx 70 USD)
Nov 30 14:30:36 <[g2]> does it run with Linux or just Windows ?
Nov 30 14:31:18 <ep1220> I do testing, development on windows.
Nov 30 14:31:55 <ep1220> i do have a lib which implements the Windows API on linux
Nov 30 14:32:04 <ep1220> using Libusb
Nov 30 14:32:37 <[g2]> this is usb 1.1 right ?
Nov 30 14:32:40 <[g2]> OHCI ?
Nov 30 14:33:08 <ep1220> You can configure the chip to use usb2.0 or 1.1
Nov 30 14:33:17 <[g2]> ahh...
Nov 30 14:33:18 <ep1220> but it is only 1.1 speed in both cases
Nov 30 14:33:39 <[g2]> so it'd be an EHCI running at full-sped but not high-speed
Nov 30 14:33:42 <[g2]> the 12Mbs
Nov 30 14:33:48 <ep1220> yes.
Nov 30 14:34:05 <ep1220> there is an EEPROM on the module
Nov 30 14:34:13 <ep1220> which holds the config data
Nov 30 14:34:25 <ep1220> so far i can only prog this one from Windows
Nov 30 14:34:45 <ep1220> i.e the EEPROM
Nov 30 14:34:53 <ep1220> (but this is a one time action)
Nov 30 14:34:59 <[g2]> nod
Nov 30 14:35:14 <[g2]> well it could be more than 1 time, but it's at least one time
Nov 30 14:35:18 <vmaster> the ftd2xx allows the eeprom to be written from linux, too
Nov 30 14:35:20 <[g2]> :)
Nov 30 14:36:29 <[g2]> hey vmaster 
Nov 30 14:36:58 <ep1220> There is not much difference between the FTDI Module vmaster has used in his thesis and mine
Nov 30 14:37:02 <[g2]> ep1220 so what are your plans for this device ?  Are you going to be selling them ?  What are you planning to do with the sw ?
Nov 30 14:37:53 <ep1220> I definitively gonna sell the PCBs
Nov 30 14:38:09 <[g2]> as a FTDI dev kit ?
Nov 30 14:38:33 <ep1220> I#d say it it is a complete JTAG IF.
Nov 30 14:38:47 <ep1220> not so much a dev kit
Nov 30 14:38:53 <ep1220> (hardware wise)
Nov 30 14:39:16 <vmaster> you plug the dlp2232m dev-kit into ep1220's pcb, and get a jtag interface
Nov 30 14:39:25 <ep1220> it has levelshifters, is designed so it can be safely attached to a running system
Nov 30 14:40:17 <ep1220> I also plan to sell a few completly assembled module at "parts cost" to people promising to write software
Nov 30 14:40:18 <[g2]> so I could plug it into a running Loft ?
Nov 30 14:40:32 <ep1220> yes.
Nov 30 14:40:48 <[g2]> and then do some JTAG debugging ?
Nov 30 14:40:53 <ep1220> yes
Nov 30 14:41:05 <[g2]> except we need JTAG software for that
Nov 30 14:41:12 <ep1220> yes :-)
Nov 30 14:41:31 <[g2]> is there a 14-pin ARM config ?
Nov 30 14:42:14 <ep1220> I am working on an adapter set which includes 14pin-ARM,EJTAG,COP,BDM and some DSP interfaces
Nov 30 14:42:35 <[g2]> so it's USB->(ep1220 board + dlp2232m)->Cable-> DUT (Device Under Test)
Nov 30 14:42:38 <ep1220> Currently i handwired a 14 to 16 pin adapter, for use on the NSLU2
Nov 30 14:43:05 <ep1220> if You have a 20 pin ARM header: yes
Nov 30 14:43:34 <ep1220> else:  usb-> JTAGIF -> adapter -> DUT
Nov 30 14:43:51 <ep1220> sorry: else:  usb-> JTAGIF -> cable -> adapter -> DUT
Nov 30 14:44:05 <vmaster> [g2]: what processor is on the loft?
Nov 30 14:44:15 <[g2]> IXP42x
Nov 30 14:46:22 <vmaster> hmm, maybe you could put ft2232 support into jelie
Nov 30 14:49:12 <vmaster> I'm hoping to add xscale support to my debugger, but I hardly find time to finish my arm7/arm9 rewrite...
Nov 30 17:10:36 <[g2]> vmaster what's your debugger ?
**** ENDING LOGGING AT Thu Dec 01 02:59:57 2005