**** BEGIN LOGGING AT Thu Jan 12 03:00:21 2006 Jan 12 10:25:57 the ixp23xx built-in 10/100 ethernet also seems to require NPE/access lib support Jan 12 10:26:05 so i might end up having a go at that Jan 12 10:57:45 lennert: any word from Fabrics? Jan 12 10:58:43 ka6sox-laptop: yeah -- they might send me a loaner board if i also do some kernel work for them Jan 12 10:58:56 ka6sox-laptop: i'll have to do kernel work anyway since the board doesn't run 2.6 at all yet Jan 12 10:59:44 ka6sox-laptop: i'll hear back from them somewhere These Days i hope Jan 12 11:01:48 COOL! Jan 12 11:24:15 beewoolie-afk: hey hey Jan 12 11:24:41 prpplague: yo. Jan 12 11:24:56 prpplague: I've been refining the basics of my JTAG test code. Jan 12 11:25:04 Today, we see if I can access the debug unit. Jan 12 11:29:24 beewoolie-afk: hehe cool Jan 12 11:29:39 i've not had time to tinker alot with the debug stuff Jan 12 11:36:21 beewoolie: hehe i was hopin to be finished with this legacy usb crap yesterday, but i looks like i wont be back dev'n till monday Jan 12 11:36:36 beewoolie: should be able to get caught up on the s3c2410 patch and send you some additional code Jan 12 11:37:02 That would be nice. Jan 12 11:37:32 beewoolie: i noticed that the changelog for both .11 and .12 have references to the lnode80 Jan 12 11:37:48 beewoolie: did something change between .11 and .12 ? Jan 12 11:37:54 Let me see... Jan 12 11:39:01 I had to recode the timer. I modified the lnode80 version as well as the others. I wanted to use proper __asm syntax so that register allocation was handled by the compiler. Moreover, I change the constraints to be more correct. Jan 12 11:39:12 The code shouldn't have changed. Jan 12 11:39:20 That is the output code shouldn't have changed. Jan 12 11:39:58 ahh ok Jan 12 11:40:04 beewoolie: just wanted to double check Jan 12 16:13:35 hi Jan 12 16:13:53 does openjtag support ixp42x ? Jan 12 16:21:18 uhm... there isn't "openjtag" as a product that could support anything Jan 12 18:01:22 ulf_k_: I wonder if you are asking about the openwince jtag software Jan 12 18:01:41 vmaster: Are you on? Jan 12 18:02:14 hi beewoolie Jan 12 18:02:25 hi Jan 12 18:06:04 well later on i realized that openwince and openjtag are not the same Jan 12 18:08:03 openjtag isn't much, so far Jan 12 18:08:19 nothing but untold megabytes of irc logs :) Jan 12 18:08:33 and a bit of code here and there Jan 12 18:16:14 lennert: Hi lennert Jan 12 18:16:31 lennert: I'm doing a timing test on the code as implemented in openwince Jan 12 18:16:42 It is interesting to note that the usleep function really blows. Jan 12 18:17:28 hi beewoolie Jan 12 18:17:29 hehe Jan 12 18:17:39 pmc3386 driver from radisys did something like Jan 12 18:17:51 os_linux_enp_udelay(int MicroSeconds) Jan 12 18:17:53 { Jan 12 18:17:56 int i; Jan 12 18:18:03 for (i=0;i ; Jan 12 18:18:04 } Jan 12 18:18:12 Um, ....yeah. Jan 12 18:18:24 In a word...poop. Jan 12 18:18:32 hell yeah Jan 12 18:19:01 It turns out that without a delay, we get about 268KHz. Jan 12 18:19:14 Moreover, I am using a very different design from openwince. Jan 12 18:19:15 parallel cble? Jan 12 18:19:26 My inner loop is much faster. Jan 12 18:19:39 At the moment, I'm testing the Xilinx III. Jan 12 18:19:48 It makes it possible for me to verify my code. Jan 12 18:19:55 right Jan 12 18:20:07 i could download the spartan3 via jtag at 700khz or so Jan 12 18:20:14 but i think that pc had a fast parallel port Jan 12 18:20:25 http://svn.wantstofly.org/vhdl/utils/ (very incomplete) Jan 12 18:20:51 Well, keep in mind that I'm looking at the clock signal. Jan 12 18:21:03 This doesn't say anything about the data throughput. Jan 12 18:21:31 i'm still not 100% sure what you're doing.. are you running openwince and looking at TCK with a scope? Jan 12 18:21:41 Moreover, I'm using the PPDEV interface which, I suspect, isn't as fast as the direct port access interface. Jan 12 18:21:50 Actually, no. Jan 12 18:22:02 I'm working on code to manipulate the JTAG scan chains. Jan 12 18:22:04 oh, yeah -- i'm just bitbanging the parallel port i/o ports from userspace (ugh ugh) Jan 12 18:22:12 I can read registers and do lots of interesting things already. Jan 12 18:22:23 I decided that I wanted to see what the throughput limit was. Jan 12 18:22:41 so time how long an MMIO cycle takes? Jan 12 18:22:42 Well, the goal is much grander. Jan 12 18:22:56 MMIO? I don't know what that means in this context. Jan 12 18:23:07 sorry, not mmio Jan 12 18:23:14 time how long it takes to do a parallel port write, i mena Jan 12 18:23:24 that gives you the throughput limit Jan 12 18:23:30 or am i still not understanding you correctly :-/ Jan 12 18:24:42 Well, the inner loop of this test is write clock high, write clock low, repeat. Jan 12 18:24:50 I'm getting about 268KHz. Jan 12 18:25:03 right, that's what i did too Jan 12 18:25:04 I'm going to see what happens if I use the port directly without ppdev. Jan 12 18:25:09 i got 700khz Jan 12 18:25:15 Perhaps your machine is faster. Jan 12 18:25:23 Are you using ppdev? Jan 12 18:25:29 try http://svn.wantstofly.org/vhdl/utils/test_speed.c ;-) Jan 12 18:25:41 no, direct port i/o, which makes it much faster as it avoids the kernel round-trip Jan 12 18:25:48 but much less portable so not a good solution Jan 12 18:26:03 Um, that code doesn't do anything. Jan 12 18:26:09 Whatsa jtag_flush? Jan 12 18:26:16 jtag.c should be called xilinx_parallel3_cable_specific_hacks.c Jan 12 18:26:20 see jtag.c in that directory Jan 12 18:26:29 i'm ashamed to even show you this stuff Jan 12 18:26:49 OK. That's using the port directly. Jan 12 18:27:07 I'm using the user-mode interface at the moment. The code runs without root privileges. Jan 12 18:27:20 which is a big plus Jan 12 18:27:32 Except that what we really care about is speed. Jan 12 18:27:35 i'm just saying, if you want to benchmark pure port accesses you can use that Jan 12 18:27:43 instead of having to hack it up yourself Jan 12 18:27:46 well, true Jan 12 18:27:47 I think I might look into using root to gain access to the port and then dropping priviledges. Jan 12 18:27:55 you need root then though Jan 12 18:27:59 Ah, right. Jan 12 18:28:03 you could use root if you have it and ppdev otherwise Jan 12 18:28:13 Or, we can make the exec file be setuid. Jan 12 18:28:51 Let me see what your code does... Jan 12 18:29:28 * beewoolie loves wget. Jan 12 18:29:49 Is this a subversion repo being exposed? Jan 12 18:29:49 * lennert loves subversion-web Jan 12 18:29:52 yes Jan 12 18:29:58 you can check it out with svn checkout http:// etc Jan 12 18:30:02 Ah, Interesting. I use subversion, but I've never exported anything. Jan 12 18:30:09 mod_dav_subversion iirc Jan 12 18:30:16 Hmm. let me try that... Jan 12 18:30:18 plugs directly into apache Jan 12 18:31:20 elf@cerise ~...lennert/utils > sudo ./test_speed Jan 12 18:31:20 parallel jtag cable not installed Jan 12 18:31:24 Ooops. Jan 12 18:31:30 it's not in lpt1? Jan 12 18:31:31 I'll bet I know what it is. Jan 12 18:32:07 my digilent cable shorts some input and some output pin Jan 12 18:32:08 so it checks that Jan 12 18:32:39 It just exits. Jan 12 18:32:51 yeah Jan 12 18:32:53 bluntly Jan 12 18:33:56 Um, I don't get it. Are you just timing the loop? Jan 12 18:33:59 yeah Jan 12 18:34:08 ah. I've got a scope on it.... Jan 12 18:34:21 you can put a "tck ^= 1;" in the inner loop if you want Jan 12 18:34:31 but whether you write tck as 0 0 0 0 or 0 1 0 1 won't make difference in speed Jan 12 18:34:36 i just use 'time' to time 16777216 writes Jan 12 18:35:24 OK. It's running at 326KHz. Faster, but not twice as fast. Interesting. Jan 12 18:35:42 it depends a lot on your motherboard chipset Jan 12 18:35:48 Thanks. That saved me some time. I'll probably still support the direct access mode just for the fun of it. Jan 12 18:35:54 How is that? Jan 12 18:35:55 specifically, the 'distance' between your cpu and southbridge Jan 12 18:36:04 Isn't this just a matter of the speed of the CPU? Jan 12 18:36:06 i.e. how long it takes to do a write to a register in the southbridge Jan 12 18:36:10 nooo, not at all Jan 12 18:36:18 my pentium 200 is likely faster at this than your p4 3.6ghz Jan 12 18:36:24 Interesting. Jan 12 18:36:34 This is a notebook running at 1.6GHz. Jan 12 18:36:41 for ages, robert olsson fastest routing box was a supermicro 933mhz pentium iii Jan 12 18:36:47 It's not a p4. It's a pentium M, I believe. Jan 12 18:36:50 why? because the pci access latency is so damn low. Jan 12 18:37:00 it creamed the xeons in every test Jan 12 18:37:11 I have a supermicro box, too. It was really great, but the athlon 64 single proc was still faster. Jan 12 18:37:23 in this test, the cpu is stalling thousands of cycles for each I/O port write.. it really is that slow. Jan 12 18:37:23 Ah. Nice. I like that company's machines. Jan 12 18:37:35 I've been waiting for them to release a dual-proc AMD machine. Jan 12 18:37:40 ...that I can afford. Jan 12 18:37:59 1.6 GHz / 326 kHz = a whopping 4907 cycles per parallel port i/o write Jan 12 18:38:47 if i get one board i was hoping to get, i'll need a pci-express mobo to put it in Jan 12 18:38:50 Even giving instructions 10 cycles per execute, we are at 500 to 1. Jan 12 18:39:02 so i'll have to buy a new mobo, and might as well just buy a nice AMD box anyway Jan 12 18:39:02 Actually, 500 to 2 since we are writing twice. Jan 12 18:39:30 This also helps with understanding the real advantages of the USB dongle. Jan 12 18:39:35 an i/o port write will likely break the pipeline completely and put the cpu in microcode Jan 12 18:39:50 that could be a couple hundred cycles Jan 12 18:39:51 I don't see what you mean. Jan 12 18:40:05 Oh, you're saying that the IO itself is really really inefficient. Jan 12 18:40:08 then to get the write to the northbridge.. to the southbridge.. and wait for the ack Jan 12 18:40:12 yes Jan 12 18:40:15 the i/o itself is dog slow Jan 12 18:40:26 that's why memory mapped IO is so nice. Jan 12 18:40:32 most PC NICs use memory-mapped I/O (i.e. memory transactions instead of i/o transactions) because of that Jan 12 18:40:35 yeah :) Jan 12 18:40:48 The port thing has been stupid for a really long time. Jan 12 18:40:51 well, on most embedded boards pci i/o is done with memory transactions anyway.. but that's a whole nother sotry Jan 12 18:41:00 I can kinda see it when there is only 64K of address space. Jan 12 18:41:06 Right. Jan 12 18:41:13 This IO port stuff is legacy. Jan 12 18:41:15 yeah Jan 12 18:41:23 and pc makers don't bother optimising i/o accesses at all Jan 12 18:41:44 (not that pci memory latency is much better, but oh well...) Jan 12 18:42:07 latency has been steadily going down the tubes Jan 12 18:42:18 bandwidth keeps improving by leaps and bounds, but latency.. Jan 12 18:42:22 latency of latency Jan 12 18:42:28 s/of/oh/ Jan 12 18:42:28 lennert meant: latency oh latency Jan 12 18:43:21 It's really killing us. Jan 12 18:43:31 Makes it even more important to get more cores. Jan 12 18:44:20 so that we can sacrifice half of the cores to stalling on i/o :) Jan 12 18:44:34 Right! Jan 12 18:44:36 and the other ones to our firewall software and virus and malware scanners Jan 12 18:44:48 and Word will still run slow Jan 12 18:44:50 More cores! More cores! Bring on the cores!!!!! Jan 12 18:44:58 haha Jan 12 18:45:00 CORES CORES CORES Jan 12 18:45:04 i'm all for more processing power :) Jan 12 18:45:06 SPAM SPAM SPAM SPAM.... Jan 12 18:45:21 :)) Jan 12 18:45:23 Wonderful cores! Wonderful cores! Jan 12 18:45:45 get your cheap cores! $100 a hundred! Jan 12 18:45:49 I saw an interesting link about a really small power supply... Jan 12 18:46:26 a power supply for each core? :) Jan 12 18:46:44 Looking... Jan 12 18:46:50 i'm very interesting in efficient hardware Jan 12 18:46:56 s/interesting/interested/ Jan 12 18:46:56 lennert meant: i'm very interested in efficient hardware Jan 12 18:46:57 http://www.bit-tech.net/news/2006/01/07/pico_psu/ Jan 12 18:47:11 What I don't get is why this is interesting. Jan 12 18:47:25 before i got the epia i was thinking about making my internet gateway an arm box Jan 12 18:47:47 120 watt.. damn, pretty small thing Jan 12 18:47:55 That's been on my agenda, too. I got close, but the slug crashes. Jan 12 18:48:10 10A at 12V is OK by me. Jan 12 18:48:10 and my slug has amnesia Jan 12 18:48:23 i was thinking of a simtec atx or mini-itx board Jan 12 18:48:34 but in the end the epia was cheaper, and doesn't draw much more power anyway Jan 12 18:49:11 I've been most interested in low power -> low noise. Jan 12 18:49:17 same Jan 12 18:49:26 my previous box was a dual xeon Jan 12 18:49:37 booting it was like firing up a jet Jan 12 18:50:21 My most common maintenance task has been replacing fans. Jan 12 18:51:20 i have an atx-size case with 4x200g disks and i just don't know how to keep it cool other than leaving the side panels off and pointing a big desk fan at it Jan 12 18:51:56 the epia board has a fan on the cpu, but since it's a 1.0ghz and i always run it at 500mhz, and since the psu fan _and_ the case fan blow/suck the exact area where the cpu, i can probably rip the cpu fan off Jan 12 18:52:18 (epia is a different box) Jan 12 22:26:16 Quiet day. Jan 12 22:28:49 ya...Hi beewoolie Jan 12 22:28:57 ka6sox-laptop: Hey man. Jan 12 22:29:14 are you able to get all the parts for ep1220's interface? Jan 12 22:29:18 ka6sox-laptop: Did I tell you I repaired the JTAG you sent me? Jan 12 22:29:26 what was wrong with it? Jan 12 22:29:29 ka6sox-laptop: I'm waiting on a resistor, of all things. Jan 12 22:29:34 ha! Jan 12 22:29:37 One of the resistors on the device failed. Jan 12 22:29:42 It broke in two. Jan 12 22:29:49 weird. Jan 12 22:29:55 I replaced it with one from the most recent order. Jan 12 22:29:56 thanks for fixing it. Jan 12 22:30:09 Luckily I bought a couple extras...erm...194 extras. Jan 12 22:30:31 ha ha! Jan 12 22:30:34 thats funny. Jan 12 22:30:34 NP. It was kinda cool that I figured it out. I mean, I'm no wizz with the hardware. Jan 12 22:30:44 It was only $3 for 200. Jan 12 22:30:57 Or, may be $4. Still, hardly worth buying anything less. Jan 12 22:31:03 ya Jan 12 22:31:18 I've been using it to write JTAG code. Jan 12 22:31:26 It's interesting how the thing is setup. Jan 12 22:31:31 Mostly, it works without too much hassle. Jan 12 22:31:32 are you using linux for fpga stuff? Jan 12 22:31:45 There are somethings I don't yet understand. Jan 12 22:31:46 (ie the ISE in Linux?) Jan 12 22:32:02 ka6sox-laptop: No, I'm working to replace the functionality of the BDI. Jan 12 22:32:35 w00t! thats what I want too! Jan 12 22:32:42 ISE...um...International Securities and Exchange? Jan 12 22:32:55 Yeah. I'm at the stage of reading lots of scan chains. Jan 12 22:32:59 the FPGA developement environment. Jan 12 22:33:28 I'm not yet sure how to get access to system registers. I suspect I need to send ARM instructions over one of the JTAG chanins. Jan 12 22:33:30 Ah. Jan 12 22:33:44 I don't think I need to learn yet another set of skills...right now. Jan 12 22:33:58 I'm OK with getting some high qwality JTAG going. Jan 12 22:34:03 I hope to use the S3e and ep1220's board. Jan 12 22:35:19 Interesting note, the fastest we can signal from my laptop is about 260KHz. Jan 12 22:35:54 not very fast. Jan 12 22:35:57 With the parallel interface. Jan 12 22:36:00 No, not fast. Jan 12 22:36:03 That's without delays. Jan 12 22:36:27 Also, I now know why the openwince code suxks so badly when we change the frequency. Jan 12 22:36:42 oh? why? Jan 12 22:36:55 The usleep () call they use to slow down signaling makes the frequency no greater than 250Hz. Jan 12 22:37:14 Sound familiar. Yep, that's the 10ms limit to the jiffies timer. Jan 12 22:37:22 heh Jan 12 22:37:36 In order to make the signaling more adjustable, I'll have to do something fancier. Jan 12 22:37:49 Like the bogomips loop. Jan 12 22:38:32 Also, openwince is really dumb about detecting cores. Jan 12 22:38:36 I remember playing with this when we were trying to figure out why the Slugs were sooooo slow. Jan 12 22:38:47 If there is nothing on the chain, it takes a really long time to detect it. Jan 12 22:39:14 Are you referring to our speed-up of the slug? or of the sluggish upload over jtag? Jan 12 22:39:19 no pun meant. Jan 12 22:39:30 the slugs were running at 1/2 speed. Jan 12 22:39:38 Right. Jan 12 22:39:44 That's was a welcome discovery. Jan 12 22:40:08 okay so if we use the S3e to do the heavy lifting of talking to the chains. Jan 12 22:40:21 it turns out that methods for dealing with the IXP core are quite different from methods using on the others. I'm been working with an ARM9 since I have so many. Jan 12 22:40:39 yeah. it would be awesome to get somthing that could signal as fast as 40MHz. Jan 12 22:41:06 My code is being designed to construct buffers of signals. I compose a command list and then process it by a driver. Jan 12 22:41:16 I mean, it is designed that way. Jan 12 22:41:25 It works pretty well and the code is really simple. Jan 12 22:41:44 The next phase will be to get the USB chip to accept a translation of these commands. Jan 12 22:42:42 cool Jan 12 22:45:04 even if we come up with replacement hardware (for the BDI) we still will need a good user interface :) Jan 12 22:45:38 the EP1220 boards are essential to allow it to be universal. Jan 12 22:48:03 There is a bothersome ommission on his design. Jan 12 22:48:06 We really need sRST. Jan 12 22:48:11 nSRST. Jan 12 22:48:26 I hope that there is a extra GPIO line we can commandeer. Jan 12 22:48:37 this is the first rev...and I think that I can make that work with the S3e Jan 12 22:48:47 I hope to have mine in Feb. Jan 12 22:48:52 Great. Jan 12 22:49:02 You mean, you expect an S3e in Feburary? Jan 12 22:50:16 yes Jan 12 22:50:28 I already have the board from EP1220 Jan 12 22:50:34 they are really nice. Jan 12 22:53:21 next time we see him I need to get with him. Jan 12 22:56:47 Have you met him before? Jan 12 22:57:07 no...we have just spoken here and via email :) Jan 12 22:57:29 I look forward to the day we have our first conference. Jan 12 22:57:58 that would be fun. Jan 12 22:59:05 I think that I'll be able to get a Schematic for the S3e board real soon now :) I need it so that I can start working with the memory controller. Jan 12 22:59:22 they have 32MB of sdram on board. Jan 12 23:00:57 That ought to be plenty. Jan 12 23:01:23 It would be handy to come up with a protocol so that the S3e could be somewhat autonomous. Jan 12 23:02:35 thats what I want to do. Jan 12 23:03:04 make it so that we can set breakpoints and do other things with the S3e being a little independent. Jan 12 23:03:12 One of the things I've toyed with is code to follow the state of the TAP. That's what the openwince version does. Jan 12 23:03:18 However, I've not found it necessary. Jan 12 23:03:51 Actually, I was thinking that the S3e would only know about JTAG. The details of how debugging is done with be handled by the host. Jan 12 23:04:05 If we want to put the debug info into the device, we'll have to specialize for every target. Jan 12 23:04:22 On the other hand, the JTAG scanning is standardized. Jan 12 23:04:26 yep Jan 12 23:04:28 All we need to do is feed it commands. Jan 12 23:04:35 okay lets start simple :) Jan 12 23:04:42 The handy thing would be an ability to download fragments and call them out. Jan 12 23:04:50 1st thing is FAST programming Jan 12 23:04:55 There is a 'reset TAP' fragment that is really obvious. Jan 12 23:05:07 Others require scanning through several chains to get a result. Jan 12 23:05:10 Macro-like. Jan 12 23:05:14 Right. Jan 12 23:05:19 then 2ond we can start scanning the chain for things : Jan 12 23:05:24 OK, here's my idea for that. Jan 12 23:05:46 There is a 32 bit port available on the ARM cores. Jan 12 23:05:51 We can send data back and forth. Jan 12 23:06:08 Well, we could write a program for the ARM that looks at this port and writes the data to flash. Jan 12 23:06:32 It adds an extra step, but it allows us to program as fast as the device can go. Jan 12 23:07:01 It also means that we don't have to write anything more that the data to program into the device. Jan 12 23:07:32 Plus, the program running on the core can buffer data, overlapping IO with the JTAG device with programming to flash. Jan 12 23:07:52 If we make it possible to perform buffered writes, we should be able to go blazing fast. Jan 12 23:08:15 The really slick method for doing this would be to put the code into cache. Jan 12 23:08:24 Then, we wouldn't even need RAM. Jan 12 23:11:44 Nice chatting. Jan 13 01:18:14 [23:07] they mis labeled the package and therefore they sent it the "wong way" Jan 13 01:18:14 [23:07] er wrong way! Jan 13 01:18:14 [23:08] we need to call 800-622-4205 (between 7am and 6pm CST) to complain and ask for the shipping charges back. Jan 13 01:18:14 [23:08] they *will* deliver the package tommorrow. Jan 13 01:18:16 [23:08] it has been re-routed to Goleta and they did verify my address and phone number. Jan 13 01:18:18 [23:28] <-- dyoung-away has quit (Read error: 110 (Connection timed out)) Jan 13 01:18:21 eeek **** ENDING LOGGING AT Fri Jan 13 02:59:57 2006