**** BEGIN LOGGING AT Wed May 24 09:59:57 2006
May 24 15:19:46 <kay2> hey
May 24 15:19:59 <prpplague> howdy
May 24 15:20:26 <kay2> someone knows with a XC2VP30, what's the max frequency ?
May 24 15:20:42 <kay2> after the PLL
May 24 15:38:23 <vmaster> according to a usenet post the dcm can output up to 450 mhz
May 24 15:38:37 <vmaster> the datasheet should have more reliable information
May 24 15:49:33 <kay2> ok
May 24 15:49:35 <kay2> so basically
May 24 15:50:18 <kay2> If I use 20 DES core from opencores in it (since there is enough room for that), I could crypt up to 450M*20 password a second
May 24 15:50:50 <kay2> which is 9 Billion pwd a second
May 24 15:51:46 <kay2> and if I use 50 of those it would be 450 Billion pwd a second
May 24 15:51:51 <kay2> that's a lot !
May 24 15:52:38 <vmaster> the maximum dcm frequency doesn't mean that every cricuit you put into the device can run at that speed
May 24 15:52:57 <kay2> vmaster: if it's logic gates
May 24 15:52:59 <kay2> why not ?
May 24 15:56:20 <kay2> vmaster: if someone could crack 450 Billion pwd a second, it means that in 3 days, he could get the key of a bank used for generating Credit card's pin
May 24 15:56:38 <vmaster> the design tools have to honor setup- and hold-times for all gates in the path
May 24 15:57:21 <kay2> vmaster: yeah but if it could run at that speed
May 24 15:57:29 <kay2> it means what I say
May 24 15:57:36 <vmaster> i believe there are several papers out that discuss the efficiency you can expect from an fpga implementation
May 24 15:57:44 <vmaster> dj bernstein wrote one, iirc
May 24 15:58:52 <kay2> $299 for a board, which means 50 boards would cost $15000
May 24 15:58:56 <kay2> which is basically nothing
May 24 15:59:16 <vmaster> yeah, but you can't do that many calculations per second
May 24 15:59:39 <kay2> well in opencores.org it says that the core could do 1 DES crypt a second
May 24 15:59:42 <kay2> I mean
May 24 15:59:47 <kay2> per clock pulse
May 24 16:00:01 <kay2> it's just piped
May 24 16:00:19 <kay2> and it does it in 24 clock pulses
May 24 16:00:37 <kay2> which means after 24 pulses you get the first pwd, then each pulse generates one pwd
May 24 16:01:18 <kay2> and even if it was 200Mhz instead of 450
May 24 16:01:35 <kay2> it would mean that I need 6 days instead of 3
May 24 16:02:03 <kay2> It means that the system used in Credit card today are really not complicated
**** ENDING LOGGING AT Thu May 25 09:59:58 2006