**** BEGIN LOGGING AT Tue Oct 10 02:59:57 2006 Oct 10 12:29:49 hello! Oct 10 12:30:38 zumbi: hi Oct 10 12:30:46 :-) Oct 10 12:31:49 i'm planning to add daisy chain jtag to a circuit with many FPGAs -i'm new to daisy chain- so... Oct 10 12:32:55 ... jtag is for programming purposes. The question i have is if you know if i have to do daisy chaining with eeproms or FPGAs, and if you know some example schematic Oct 10 12:34:43 daisy chaining is rather easy - just connect TDI->TDO from one device to the next, and connect TCK and TMS (optionally TRST) to each device in parallel Oct 10 12:35:16 you might run into problems with too many devices in the chain though Oct 10 12:35:31 vmaster: but memories (EEPROM)? (there are 3 devices) Oct 10 12:36:11 is there a jtag port on these eeproms? Oct 10 12:36:45 vmaster: i guess, it's an eeprom for that FPGA Oct 10 12:37:31 Xilinx? Oct 10 12:38:12 yes Oct 10 12:38:37 http://direct.xilinx.com/bvdocs/publications/ds123.pdf Oct 10 12:38:50 those are programming memories Oct 10 12:39:32 anyway, vmaster, thank you very much Oct 10 12:41:57 vmaster: about openjtag, how is the project status ? do you need some volunteer help? Oct 10 12:43:30 i don't think there's a lot happening here lately. someone started working on a ARM9+FPGA board (iirc) to allow high JTAG speeds, but haven't heard about this project for a while Oct 10 12:45:18 regarding your fpgas: if you have JTAG available at each FPGA, you can configure them on the fly, without writing the EEPROM each time Oct 10 12:46:11 the datasheet mentions problems with some devices that follow the standard close enough - some change TDO on the rising edge of TCK, and some on the falling edge Oct 10 12:46:56 s/that follow/that don't follow/ Oct 10 12:46:57 vmaster meant: the datasheet mentions problems with some devices that don't follow the standard close enough - some change TDO on the rising edge of TCK, and some on the falling edge Oct 10 12:47:27 i see Oct 10 12:48:32 well, thanks Oct 10 12:48:40 * zumbi reads openjtag webpage Oct 10 12:49:04 <[g2]> vmaster I think things are warming up a little Oct 10 12:49:48 [g2]: yeah, i saw AchiestDragon online, but I believe this is only temporary? Oct 10 12:51:15 <[g2]> vmaster I'm talking about something else Oct 10 12:51:27 [g2]: ah, ok :) Oct 10 12:55:42 <[g2]> vmaster what kinda of jtag speeds do you see with the Olimex usb jtag device ? Oct 10 12:56:26 the FT2232 achieves about 1.5-2 MHz effective JTAG clock while debugging an ARM7/9 Oct 10 12:56:48 that's good enough for downloading at ~120kb/s Oct 10 12:57:02 <[g2]> that's pretty fast Oct 10 12:57:20 fast enough for most purpose, imho Oct 10 12:57:28 s/purpose/purposes/ Oct 10 12:57:29 vmaster meant: fast enough for most purposes, imho Oct 10 12:57:52 <[g2]> yeah fast enough that it's not painful Oct 10 13:06:28 have you used opencores' usb core for these purposes? Oct 10 13:16:45 some of the balloon people have developed a fast jtag widget too: Oct 10 13:16:46 http://balloonboard.org/~lwithers/urppd/ Oct 10 13:17:07 using cypress EZ-USB device Oct 10 13:17:18 released under GPL2 Oct 10 17:06:39 vmaster: http://pastebin.ca/196499 Oct 10 17:17:39 hey prpplague Oct 10 17:18:32 could you run again with debugging enabled (-d) Oct 10 17:18:34 ? Oct 10 17:36:26 vmaster: you turn on the highdrive for your ft2232 based devices? Oct 10 17:37:28 only for the one that doesn Oct 10 17:37:32 't have buffers Oct 10 17:37:35 hmm Oct 10 17:37:49 i'm having alot of problems with one of prototype boards Oct 10 17:38:24 vmaster: its communicates but get a ton of errors Oct 10 17:38:34 did you try lowering the speed? Oct 10 17:38:37 vmaster: yea Oct 10 17:38:42 vmaster: all the way down to 10 Oct 10 17:40:02 you removed R9/C9 on that board, too? Oct 10 17:40:20 yea Oct 10 17:41:13 vmaster: whats interesting is that my board worked fine with the leds, but these act like the leds are drawing too much current Oct 10 17:41:37 vmaster: i've removed the leds for now, but it still seems like something isn't right Oct 10 17:42:03 i'm wondering if dlpdesign changed their default firmware settings Oct 10 17:42:30 vmaster: did you use the linux example code to turn on the high driver outputs? Oct 10 17:42:45 yeah, the windoze stuff never worked for me Oct 10 17:43:25 vmaster: i have a very hard time with ftdi docs, do i simply set the value in the eeprom to 0x01 to enable high drive? Oct 10 17:44:00 the eeprom stuff is barely documented, iirc Oct 10 17:44:40 Data.AIsHighCurrent = 1; // non-zero if interface is high current Oct 10 17:44:58 that's what I changed in sample/EEPROM/write/main.c Oct 10 17:47:14 vmaster: ok gotcha Oct 10 17:48:44 vmaster: hmm, you have to write all the values back out? Oct 10 17:49:15 vmaster: hmm, what is the max current you have on your devices? Oct 10 17:56:34 vmaster: don't suppose you could give me a eeprom dump of one of your working devices? Oct 10 18:02:44 prpplague: sorry, just had a doner kebap for lunch Oct 10 18:03:19 prpplague: i'll send you a dump and the .c file i've used to program it Oct 10 18:03:43 vmaster: thanks Oct 10 18:08:31 prpplague: mmd.ath.cx/ft2232_highdrive.c Oct 10 18:08:57 dumping the eeprom is only possible with libftdi, right? Oct 10 18:09:21 vmaster: seems to be possible with the d2xx Oct 10 18:09:37 vmaster: under samples there is a read function Oct 10 18:24:01 http://mmd.ath.cx/ft2232_highdrive.c Oct 10 18:25:54 http://mmd.ath.cx/EEPROM.dump Oct 10 18:26:14 the output from read/main.c is ASCII, if you'd like, I could modify it so it dumps to a file Oct 10 18:55:47 vmaster: thanks Oct 10 18:56:00 vmaster: think we found the problem with one of the jtag lines on the main board Oct 10 18:56:07 vmaster: its very noisy Oct 10 19:15:33 prpplague: could you figure out why? Oct 10 19:16:21 vmaster: looks to be a board layout issue **** ENDING LOGGING AT Wed Oct 11 02:59:56 2006