**** BEGIN LOGGING AT Mon Feb 12 02:59:57 2007
Feb 12 09:16:54 <nm__> vmaster: hey, are you there
Feb 12 09:27:14 <vmaster> hey nm__ 
Feb 12 09:37:20 <nm__> vmaster: do you know StrataFlash TE series on IXP 4xx platform ?
Feb 12 09:38:51 <vmaster> uhm, don't think so
Feb 12 09:44:35 <nm__> vmaster:  i want to flash my SF TE using jtag connector, do  i need special when wired SF  TE Series to IXP 4xx ?
Feb 12 09:45:10 <vmaster> sorry, I have no idea what you mean
Feb 12 09:45:32 <nm__> vmaster: okie thx guy ;)
Feb 12 10:00:10 <nm__> vmaster: can you give me some information how do jtag erase/reprogramming external flash ? 
Feb 12 10:06:38 <vmaster> basically there are two ways - one uses the boundary scan chain to get direct access to the bus, the other uses debug features of the core to access the bus
Feb 12 10:07:30 <vmaster> the openwince jtag tools use the first method, the OpenOCD uses the second
Feb 12 10:07:47 <nm__> vmaster: okie i see,
Feb 12 10:08:18 <nm__> vmaster: what about open jtag tool ?
Feb 12 10:09:00 <nm__> i want to sure that my diagram to SF TE flash work well w/ flashing using jtag . Can you give me some keyword for search this problem ?
Feb 12 10:23:43 <vmaster> if the CPU can access the flash, JTAG will be able to access it, too
Feb 12 10:25:25 <rwhitby> nm__: nslu2 has stratflash, and the nslu2-linux.org wiki has details on how to flash that with openwince tools
Feb 12 10:25:59 <rwhitby> (the first method vmaster referred to)
Feb 12 12:03:38 <nm> rwhitby: okie
**** ENDING LOGGING AT Tue Feb 13 03:00:00 2007