**** BEGIN LOGGING AT Mon Mar 31 03:00:02 2008 Mar 31 14:15:08 i dunno, i'm trying to use it to program the flash memory of my IXP 465 with a wiggler Mar 31 15:16:41 gandhijee: make sure the cpu is halted Mar 31 15:17:22 i get scan errors Mar 31 15:17:45 i'll set it back up in a lil bit, i got the code for the wiggler software for windows Mar 31 15:18:02 but i'd rather get openOCD running Mar 31 15:19:02 you'll get scan errors if the reset protocol is wrong Mar 31 16:05:42 well all of the settings give me erros Mar 31 16:10:40 this is the error i get Mar 31 16:10:41 http://pastebin.ca/964825 Mar 31 16:12:49 if the scan always returns zero, the jtag simply isn't connected Mar 31 16:14:52 i c Mar 31 16:17:53 some devices make you jump through some hoops to enable it Mar 31 16:18:09 how so? Mar 31 16:20:19 various ways Mar 31 16:21:01 but, if your windows software works, it must just be some kind of setting Mar 31 16:21:04 you know anything for IXP4xx devices? Mar 31 20:05:57 Hi all, whats the state of the art with the fastest open design for a jtag interface, USB/FTDI or better? Mar 31 20:28:17 ali_as: ft2232 seems to be item of choice, we use it for the flyswatter and have yet to have a problem with performance or reliability Mar 31 20:28:51 Limited to less than about 5Mbit though? Mar 31 20:29:04 that sounds about right Mar 31 20:29:14 ali_as: jtag wasn't really designed for high speed Mar 31 20:30:58 Some parts go to 80MHz. My lpt port dabblings are rather slow. A few K a second for ejtag. Mar 31 20:31:44 indeed Mar 31 20:32:04 I asked about geep-b in #openhardware and it was suggested that project died. Mar 31 20:32:23 ali_as: the ft2232 is fast enough for us to flash nor/nand as well as debug and do co-verification Mar 31 20:32:34 ali_as: no real complaints for us Mar 31 20:32:41 us==me and my employeer Mar 31 20:34:23 I like the idea of an ethernet solution, so I'm dabbling in this directionwith a development board. Mar 31 20:35:03 ali_as: it is doable Mar 31 20:36:02 I've hit limitations of bus speed with the oki arm chip, so I'm hunting round for how other people are solving the problem. Mar 31 20:36:44 might try one of our hammer boards Mar 31 20:36:57 http://www.elinux.org/Hammer_Board Mar 31 20:38:27 Ok, thats a confusing spec, 200MHz ARM9 delivering 100MIPS. Mar 31 20:39:01 haha Mar 31 20:39:02 ali_as: thats an incorrect posting, that should be 100BogoMIPS Mar 31 20:39:15 ali_as: its 220MIPS Mar 31 20:40:57 ali_as: BogoMIPS are 'Bogus' MIPS and are barely reliable between the same CPU cores Mar 31 20:41:15 That sounds right. Surprised and pleased the ARM9 cores are reaching strongarm speeds. Mar 31 20:41:27 ali_as: that too is incorrect Mar 31 20:41:32 I take it the peripheral bus is dog slow though? Mar 31 20:41:40 much better memory bus, and StrongARM where generally 200 Mar 31 20:41:53 ali_as: you are comparing clock speeds when you also have to consider the number of stages of pipes for the device Mar 31 20:41:54 whereas most ARM9s can reach 266 or even 533MHz Mar 31 20:42:55 From memory strongarm had more stages and the barrel shifter was bypassed when not used. Mar 31 20:43:19 ali_as: more stages than an arm9 Mar 31 20:43:22 sorry Mar 31 20:43:24 arm7 Mar 31 20:43:36 the shifter is basically free on pretty much all arm cores Mar 31 20:44:13 ali_as: arm9 and strongarm basically have the same 5 stages Mar 31 20:44:42 ali_as: xscale has an odd 7/8 stage, whereas true arm11 has 8 Mar 31 20:45:23 I havn't looked at the ARM9 recently, I went for the ARM7 board by simtec as it has a 10/100 Ethernet chip and cpld. Mar 31 20:46:00 But it only runs at 60MHz and the bus itself can barely push 15Mhz. Mar 31 20:47:06 I understand the peripheral bus is very very slow on the ARM chips generally, so bitbanging the gpio's is too slow to be useful. Mar 31 20:47:58 ali_as: the internal busses on the ARM9 devices is generally run at 66MHz Mar 31 20:48:20 xscale is what strongarm became when intel ate DEC, now sold to marvel I'm told. Mar 31 20:49:05 Intel is pushing x86 for mobile embedded applications now but they can't yet match ARMs MIPS/Watt advantage. Mar 31 20:49:10 i thought compaq ate dec Mar 31 20:49:45 hmm, i'm not sure if compaq ate all of dec Mar 31 20:49:55 They certainly aquired the alpha, and then killed it. Mar 31 20:50:00 yes Mar 31 20:50:14 I think a fab and rights to strongarm went to intel. Mar 31 20:50:33 yes, but when it was still dec Mar 31 20:51:10 bjdooks, busses plural, including the 'B' bus? Mar 31 20:51:29 On our S3C2440, the AHB runs 133, APB at 66 Mar 31 20:51:52 Thats damn good. Mar 31 20:52:12 I stand corrected. Mar 31 20:52:19 The AHB goes to a few blocks, and an AHB<>APB bridge Mar 31 20:52:48 where most of the slower peripherals such as UARTs and suchlike live Mar 31 20:53:03 And the GPIO's usually. Mar 31 20:55:54 bjdooks: thats the same as ours Mar 31 20:56:26 bjdooks: wait no thats incorrect, we run our AHB at 100 since we are using lowpower sdram Mar 31 20:56:34 bjdooks: our 2410 is at 133 Mar 31 21:00:37 simtec are running their ram at about 1Mhz. I have the feeling they wern't really trying. Mar 31 21:03:38 ? Mar 31 21:03:38 Is the hammer board full speed usb only? Mar 31 21:04:20 ali_as: correct Mar 31 21:04:25 Its an ARM7 board, almost all the default settings in the supplied uclinux build have timings at the slowest they can possibly be. Mar 31 21:04:50 uclinux build/bootloader. Mar 31 21:04:54 I know the IO settings are conservative, but the SDRAM should be running at full speed Mar 31 21:05:54 I'm a little out of love with simtec, submitted a query and the website says it will be answered within "28 days". Mar 31 21:06:14 This is day 23. Mar 31 21:06:44 * prpplague points to bjdooks Mar 31 21:07:53 Good grief, that name was ringing a very tiny bell in the back of my head, you work for simtec Ben? Mar 31 21:08:13 yes Mar 31 21:08:53 Then I apologise partially for the rant :) Mar 31 21:10:15 I don't have access to the support system, so can't fish out the query Mar 31 21:10:49 Thats fine, I figured out the answer after three days, I'm leaving the query in there now just to see how long it takes. Mar 31 21:11:51 website says it will be answered within "28 days". Mar 31 21:11:55 bah Mar 31 21:12:44 I rather expected that to be worst case, in the middle of a hurricane sort of time. Mar 31 21:13:51 The headaches I'm getting currently arn't from the board itself, but from the oki chip anyway. Mar 31 21:15:55 I will pick your brain if I may though. Any idea how fast the timings on the ethernet chip can be run reliably? Mar 31 21:18:40 The register is currently set to 4 for bank0/1, which is 2 =12 =6 clock cycles. Mar 31 21:18:57 Whoops, 2+12+6 clocks. Mar 31 21:20:54 does anyone know if i can use the Keil ULINK with openOCD? Mar 31 21:22:58 (On the OKI 675001DIP). Mar 31 21:34:18 ali_as: I'm not sure if it can go lots faster, it does require a bit of recovery time after access Mar 31 21:35:09 I'll check the datasheet again, I thought it would operate at 15 or 20Mhz. Mar 31 21:35:37 the access times can be fast, it just needs delays between the address and data registers Mar 31 21:35:49 Ahhh. Mar 31 21:38:45 I'm implimenting a latch in the cpld and getting 135ns between STRH's after turning the bus to 1+1+1. I was after a jtag device throughput of 1M/sec, with the ethernet chip at 2+12+6 I was starting to doubt that was even possible. Mar 31 21:40:12 ali_as: if it is just gpio, i think the gpio block would be faster Mar 31 21:40:26 ali_as: otherwise, implement a shift-register in the cpld Mar 31 21:41:25 A much more complicated cpld design is on the cards. Mar 31 21:41:41 personal or work? Mar 31 21:41:53 Personal. Mar 31 21:42:26 yeah, I started something like that and then got distracted by shiny FPGAs Mar 31 21:43:08 I'm the other way around, I was burned by xilinx fpgas and see cplds as a much safer option. Mar 31 21:43:22 I tend to get burned by soldering irons Mar 31 21:44:14 When I implimented ejtag on a wiggler I ended up with a data rate around 3K/second. Mar 31 21:44:39 the modern pcs at work can get close to 1MHz Mar 31 21:44:53 Which is not funny if you want to transfer 64M. Mar 31 21:44:53 but PCs with parallel ports are a dying breed, so we moved to FTDI Mar 31 21:45:42 I use an lpt port card, so my effective tck is not much under 1MHz. Mar 31 21:46:59 EJTAG was not designed to be a high speed protocol, it's one of the ones you have to spoon feed the cpu instructions in order to get data in or out. Mar 31 21:47:17 yeah, using the DCC helps a lot Mar 31 21:47:33 DCC? Mar 31 21:47:43 sending data using the DCC block in the ICE Mar 31 21:47:51 32bit comms register Mar 31 21:48:15 OpenOCD uses it for the 'fast' download modes Mar 31 21:49:06 If this is DMA mode then it died somewhere around EJTAG 2.5. Mar 31 21:49:31 i've not tried EJTAG Mar 31 21:50:29 Ahh. EJTAG is evolving backwards. 2.0 had a DMA mode, 2.5 you have to stall the cpu and feed it instructions. Mar 31 21:50:57 ah, i'm generally using OpenOCD with the ARMs we ave Mar 31 21:51:45 we use 8 ft2232 devices on one device to do gang testing/programming of our arm cpu boards Mar 31 21:53:09 At the moment I'm interested in a solution that will work with ARM/MIPS/ST20/ST40 and a few others. Mar 31 21:53:17 we do a series of tests on a few of the critical gpio's, some sdram and flash tests, and them flash the board Mar 31 21:53:49 OpenOCD is heading is some very nice directions. Mar 31 21:54:29 I have read that Athlon chips have a jtag interface and can be debugged thhrough it. Mar 31 21:54:50 bjdooks: you guys use jtag to do any hardware verification? or just for flashing and debugging? Mar 31 21:54:53 * bjdooks wonders if he is going to regret buying another Gigabyte board Mar 31 21:55:23 prpplague: some basic, then a full test suite is run which is also available to the user to try Mar 31 21:55:28 prp, using boundary scan? Mar 31 21:55:35 ali_as: yea Mar 31 21:57:31 I've dabbled with that in my own programs, something I want to work on. Mar 31 21:57:50 Are you using tools developed inside the company for those tasks? Mar 31 21:58:07 ali_as: openocd Mar 31 21:58:47 I didn't know it could do that. I only found out about the project recently. Mar 31 21:59:26 ali_as: it is not design to do hardware verification, but it can be tweaked and use openocd scripts to do the job Mar 31 21:59:52 ali_as: we use the gpio lines of the ft2232 to verify different lines as well as upload test programs and execute them Mar 31 21:59:58 can openOCD be used to flash memory? Mar 31 22:00:08 gandhijee: hehe yea Mar 31 22:00:08 Running bit algorithms to test the board tracks, that sort of thing? Mar 31 22:00:14 yea Mar 31 22:11:50 I am starting to question my need for high clock rates. My current pet mips cpu is limited to 5MHz TCK anyway. Mar 31 22:12:29 But ethernet still solves so many problems I can't do easily by usb. Mar 31 22:46:52 * bjdooks goes to finish building his new AMD Phenom based machine Mar 31 22:49:40 Why AMD out of interest? Mar 31 22:50:21 I'm about to upgrade and for the first time I'm planning to defect to intel. Mar 31 22:50:58 Oh 'goes' misread. Mar 31 22:53:16 got an Phenom 9500 after all the hassle with this gigabyte/nvidia board, ended up buying a gigabyte/amd-fx570 instead Mar 31 22:54:54 My old athlon has an msi motherboard, lpt port is glitchy like nothing on earth. Months of trying to track down faults in my circuits that wern't there. Mar 31 22:55:20 i'm setting it up as a build/test box then possibly swapping my desktop out to become my media pc... got my eye on a nice silverstone technology HTPC case Mar 31 22:55:49 I'm with you on the media pc idea. I want my next one to be watercooled and completely silent. Mar 31 22:56:33 i'm just looking at some decent coolers for an AMD x2 system Mar 31 22:56:57 The 45nm core2 chips look really good though, so I'm splitting with amd. Mar 31 22:58:34 http://www.bjorn3d.com/read.php?cID=857 Mar 31 23:00:02 Six hard drive spaces! Mar 31 23:01:51 Geforce graphics cards problems, I'm wondering if that means the 8800's won't fit. Mar 31 23:06:22 i'm not even sure if i'll bother with one, and just boot the os over the network Mar 31 23:17:16 It's a stunning case but I'd hate to find out I didn't have enough space for a decent graphics card. Mine needs to be a complete replacement and I don't have a server. Mar 31 23:30:45 I've looked through the dm9000 manual and I can't see any requirements for extra delays. The raw cpu interface could almost be run at 1+1+1. Mar 31 23:31:30 But at 20ns write strobe its under the 22ns spec. Mar 31 23:35:28 is that the dm9000a, dm9000b or dm9000e Mar 31 23:37:02 That's a good question. Mar 31 23:37:46 The manual just says dm9000, I assumed it applied to any and all in the range. Mar 31 23:38:34 It's an E on the board. Mar 31 23:39:43 Ahh, the order info in this data sheet is for the E only, so it matches. Mar 31 23:40:33 the A and B parts are newer and faster Mar 31 23:41:03 Yeah, this is from 2004, but if this is worst case I don't see where the problem is. Mar 31 23:42:23 you are welcome to try. you could always use ncs2/ncs3 to talk to the cpld Mar 31 23:42:50 Currently I am doing, aparently that loses me nWait delays. Mar 31 23:44:18 I've taken bank 2/3 down to 1+1+1 and the cpld works fine, but if I can't get data to the ethernet fast enough it would be a waste working out a complicated cpld jtag design. Mar 31 23:45:44 I'm after one megabyte a second, on the basis my micro connect lists around $3000 and does one megabit. Apr 01 00:06:26 Nite all. **** ENDING LOGGING AT Tue Apr 01 02:59:56 2008