**** BEGIN LOGGING AT Wed Apr 16 02:59:56 2008 Apr 16 23:28:40 is anyone familiar with urjtag and pxa targets? Apr 16 23:29:48 trying to access a pxa270 here... the cpu is identified correctly but it seems it can't read any memory :/ Apr 16 23:41:17 Looks like you arn't having much luck. Apr 16 23:42:55 I've not played with urjtag yet and Ive not done anything with ARM targets, are you using an ICE reading method or a boundary scan method? Apr 16 23:43:05 bsr Apr 16 23:43:17 Active bus: Apr 16 23:43:17 *0: Intel PXA27x compatible bus driver via BSR (JTAG part No. 0) Apr 16 23:43:45 Potentially the least compatable then. Apr 16 23:43:53 why? Apr 16 23:44:56 Makes assumptions about the way it is wired, small changes in the cpu screw things up.... Apr 16 23:45:09 Not speaking for experience with ARM though. Apr 16 23:45:34 Maybe you should try one of the tools that uses a debug method. Apr 16 23:45:36 well, the pinout should be fixed i think... Apr 16 23:46:04 yeah i tried openocd but it needs ntrst and nsrst and my current cable doesn't have them Apr 16 23:46:54 Tried wiring nTRST high and running anyway? Apr 16 23:48:10 well it's high when unconnected i guess, seeing as all the normal tap commands work... but xscale seems to be very picky about reset sequence necessary to enter debug Apr 16 23:48:11 Tried OCDCommander even? Apr 16 23:48:33 Doh. Apr 16 23:48:44 i have ft2232 cable... ocdcommander doesn't seem to support those Apr 16 23:49:13 Can you try/make a wigger? Apr 16 23:49:27 Wiggler. Apr 16 23:50:23 don't have any parts at the moment... ordered an olimex wiggler but it probably won't get here until next week :/ Apr 16 23:50:46 thought maybe i can get something working with this one in meantime Apr 16 23:51:39 There's no boundary scan selection line is there btw? Apr 16 23:51:52 hmm not sure what you mean Apr 16 23:52:15 As in raise pin blah to enable boundary scan. Apr 16 23:53:04 Sometimes apears on ports as JSEL I think. Apr 16 23:53:24 nope, only standard pins in the datasheet Apr 16 23:54:03 Or depending on how devious the manufacture is, a bootstrap option for a line on the address bus. Apr 16 23:54:08 * ali_as curses NEC. Apr 16 23:56:39 Do you have the option to read the sample register of the running board? Apr 16 23:57:18 Sample/Preload Apr 16 23:57:47 I'm just thinking of things that might cause your symptoms. Apr 16 23:57:56 One of them is a misconnected TDI. Apr 16 23:58:53 With TDI broken, IDCODE read will generally succeed as this is the default entry in the instruction reg, so many programs assume this when they scan the chain to identify parts. Apr 16 23:58:58 i'm pretty sure i gor tdi right... i could shift in a pattern and observe it on tdo Apr 16 23:59:22 Agreed, if that works then TDI is not the problem. Apr 16 23:59:38 and yeah, i can execute commands manually Apr 17 00:00:08 Ok, so sample/preload gives you data, and boundary scan 0 crashes the board? Apr 17 00:00:22 boundary scan 0? Apr 17 00:00:42 i'm using peek 0 to test Apr 17 00:00:45 Instruction reg of 0 is usually boundary scan. Apr 17 00:00:48 and it just returns FFFF Apr 17 00:01:09 Formerly a mandatory part of the jtag spec, now discouraged. Apr 17 00:01:29 you mean extest? Apr 17 00:01:38 Yes, that is what I mean. Apr 17 00:11:07 hmm if i execute extest, next sample/preload results in dr with a lot of 1s... i wonder if i'm doing it wrong Apr 17 00:20:15 If the board activity dies when you execute it for the first time after power up, then something is working at least. Apr 17 00:21:18 prpplague mentioned his company test their boards with openocd with boundary scan using scripts. Apr 17 00:21:42 You could probably read/write flash the same way with some effort. **** ENDING LOGGING AT Thu Apr 17 02:59:57 2008