**** BEGIN LOGGING AT Fri May 08 02:59:57 2009
May 08 16:36:44 <mlundin> Hi, is dirk around ?
May 08 16:43:28 <dirk2> mlundin: hi!
May 08 16:43:35 <dirk2> mlundin: Great work!!
May 08 16:44:15 <mlundin> tested ?
May 08 16:44:45 <dirk2> the first part, stop and start the target
May 08 16:45:03 <dirk2> I did a md 0x80000000 0x4000 in U-Boot
May 08 16:45:14 <dirk2> then a lot of memory dump scrolls through
May 08 16:45:28 <dirk2> and you can see how the target stops and re-runs
May 08 16:45:31 <mlundin> you asked for it :)
May 08 16:45:48 <dirk2> but you are right, doing this x times, it looks like the targets hangs then
May 08 16:46:10 <dirk2> mlundin: asked: Yes, many many thanks!
May 08 16:46:42 <dirk2> I'm currently writing a new summary with Strontiums scripts updated for the mailing list
May 08 16:46:56 <mlundin> as I mentioned, there is alot to the proper procedure on how to cleanly stop and restarty, we dont do that
May 08 16:47:00 <dirk2> Then I will update the wiki, too, and test your commands step by step
May 08 16:47:58 <dirk2> mlundin: broken start/stop: No problem! I'm really happy that we are now near of 'doing real things' :)
May 08 16:48:33 <dirk2> and hopefully more people will step in when they see that we are near to do useful things
May 08 16:48:34 <mlundin> You can also find the memory controller GPMC_BASE 0x6E000000
May 08 16:48:51 <dirk2> that's why I try to keep the status up to date
May 08 16:49:05 <mlundin> using , I think,  dapsel 0
May 08 16:49:20 <dirk2> mlundin: Great. Sounds like I will have something to play with at the weekend ;)
May 08 16:49:49 <mlundin> This is in OMAP TRM 11.1.7.1
May 08 16:50:02 <dirk2> ok
May 08 16:50:12 <mlundin> We can see if we can match this to the memory config
May 08 16:50:31 <mlundin> then we can try flash programming
May 08 16:54:18 <dirk2> mlundin: Enjoy the wine!
May 08 17:06:32 <mlundin> :)
May 08 17:09:50 <vkle> Hi!
May 08 17:13:37 <mlundin> I am new to IRC so maybe I am shouting instead of directing conversations, is it nick: ?
May 08 17:16:12 <vkle> I have some problems with openocd. Somebody have time to help me or give an advise?
May 08 17:17:15 <mlundin> ask and answers might appear
May 08 17:19:46 <vkle> Ok
May 08 17:21:37 <vkle> I use an LPC2138 controller for automatic helicopter control...
May 08 17:22:07 <vkle> I've installed new version of openOCD from yagarto toolkit...
May 08 17:22:54 <vkle> I've rewrite old scripts with a new syntax...
May 08 17:23:49 <pthomas__> vkle, I'm new to openocd too, but maybe I can help.
May 08 17:25:11 <mlundin> vkie: What does not work ?
May 08 17:25:52 <vkle> wm
May 08 17:26:40 <vkle> OpenOCD starts well. Info: JTAG Tap/device matched
May 08 17:26:59 <vkle> LPC in reset state
May 08 17:27:59 <vkle> When I'm trying to flash my LPC with command "monitor flash write_image erase main.elf elf"
May 08 17:28:20 <vkle> OpenOCD says that everything OK.
May 08 17:28:54 <vkle> But when I verify with command "monitor verify_image main.elf"
May 08 17:29:22 <vkle> It sais that verification failed...
May 08 17:30:20 <vkle> And I don't know how to fix this...
May 08 17:33:55 <vkle> Anyone know?
May 08 17:34:14 <pthomas__> maybe the flash isn't set up correctly
May 08 17:34:34 <mlundin> Possible cause, flash controller uses differnet memory address base from from the execution mapping
May 08 17:34:46 <pthomas__> you might use mdw and mww to test out the flash range
May 08 17:35:05 <mlundin> Every supplier has different schemes, big confusion
May 08 17:35:35 <mlundin> I mostly uses a .bin file
May 08 17:35:57 <vkle> And how to use mdw and mww to test flash range?
May 08 17:36:00 <mlundin> do manual erase flash erase_sector 0 0 nn
May 08 17:36:36 <mlundin> flash write_bank 0 filename.bin 0
May 08 17:37:29 <mlundin> and verify_image filename.bin
May 08 17:37:45 <vkle> Ok, wait a minute...
May 08 17:37:50 <mlundin> Cannot use mww to flash
May 08 17:38:06 <mlundin> Can try to use mdw
May 08 17:38:16 <mlundin> But flash info 0 is best
May 08 17:39:24 <vkle> flash info 0 says that banks 0-26 are protected
May 08 17:40:08 <vkle> What does it mean "protected"?
May 08 17:41:28 <vkle> When I use an ISP tool with NXP Flash Utility everithing is OK.
May 08 17:41:48 <mlundin> usually no problem, the flash writer handles this for you
May 08 17:43:53 <mlundin> just make sure the sectors receiving the image are erased, flash erase_check 0
May 08 17:45:02 <vkle> all sectors exept 0 are erased
May 08 17:46:05 <vkle> flash erase 0 0 0 sais "invalid command name
May 08 17:46:58 <mlundin>  flash erase_sector
May 08 17:47:27 <mlundin>  flash erase_sector 0 0 <lastsectornumber>
May 08 17:48:16 <vkle> done
May 08 17:48:34 <vkle> but 0 sector not erased again...
May 08 17:49:25 <mlundin> that is a report bug I think, try to falsh
May 08 17:51:07 <mlundin> its on the list of strange output when openocd actually works :(, not yet investigated
May 08 17:52:11 <vkle> flash write_image erase main.elf elf says "wrote 34728 bytes"
May 08 17:52:29 <mlundin> now verify
May 08 17:54:23 <vkle> done
May 08 17:54:24 <vkle> checksum mismatch - attempting binary compare
May 08 17:54:24 <vkle> Verify operation failed address 0x00000000. Was 0x34 instead of 0x18
May 08 17:54:24 <vkle> Runtime error, file "command.c", line 456:
May 08 17:54:30 <mlundin> and reset run
May 08 17:55:33 <vkle> reset run? and how about verification?
May 08 17:55:54 <mlundin> try to write a bin file, not elf, my experience is much better with bin files
May 08 17:56:05 <vkle> ok
May 08 17:56:10 <vkle> wait a minute
May 08 18:03:44 <vkle> the same result
May 08 18:04:50 <vkle> but sectors [0-8] anre not erased
May 08 18:08:00 <vkle> bad controller or openocd bug?
May 08 18:15:42 <mlundin> dont mind the erase check messages they are weird, of the flash routine says "wrote 34728 bytes" that is what has happened.
May 08 18:16:06 <mlundin> Ive done it lots of times on a LPC2124
May 08 18:16:37 <mlundin> What JTAG controller and jtag speed do you use ?
May 08 18:17:22 <vkle> Olimex ARM-USB-OCD and jtag_speed 5
May 08 18:19:36 <mlundin> For an erased chip, and that is what you have by now, use something real slow,  jtag_khz 30, and increas this when the program is up and running with clocks and pll configured
May 08 18:20:40 <mlundin> jtag_speed 5 is like 1MHz an that is to much for an emty chip running off the reset clock
May 08 18:22:34 <vkle> ok
May 08 18:22:41 <vkle> trying... 30 kHz
May 08 18:23:09 <mlundin> ok, got to go, hope this helps, good luck
May 08 18:23:27 <vkle> Thanks!
May 08 19:20:47 <vkle> 30 kHz don't work... the same error "checksum mismatch..."
May 08 19:21:02 <vkle> and the same value 0x34 and 0x18
May 08 19:44:27 <vkle> It interesting 0x18 is the same that 0x34 but byte order is different...
**** ENDING LOGGING AT Sat May 09 02:59:57 2009