**** BEGIN LOGGING AT Wed Nov 18 03:00:03 2009
Nov 18 11:46:44 <Kebianizao|work> Hello
Nov 18 11:47:25 <Kebianizao|work> what are the constrains to read a physical address using jtag when linux is running? (on ARM926 arch)
Nov 18 11:51:41 <Kebianizao|work> or IOW, I'm attached to target using openocd, I can halt it, but if I try a regular mdw (memory dump word) I get a data abort 
Nov 18 22:32:19 <tzanger> hmm
Nov 18 22:32:35 <tzanger> lpc2103 here with an olimex usb jtag
Nov 18 22:32:35 <tzanger> I can see the device
Nov 18 22:33:22 <roxfan> good for you!
Nov 18 22:33:49 <tzanger> but it's reporting back that there's a configuration failure
Nov 18 22:33:50 <tzanger> Error: invalid mode value encountered 0
Nov 18 22:33:50 <tzanger> Error: cpsr contains invalid mode value - communication failure
Nov 18 22:33:57 <tzanger> I've played with the jtag speed
Nov 18 22:34:07 <tzanger> I don't think it's a connection issue
Nov 18 22:34:25 <roxfan> does it dump the register values it gets?
Nov 18 22:34:37 <tzanger> it does, but I can't do anything
Nov 18 22:34:38 <roxfan> maybe try increasing verbosity
Nov 18 22:34:50 <roxfan> what are the values? do the look right?
Nov 18 22:35:11 <tzanger> it looks like it might be
Nov 18 22:35:19 <tzanger> I mean RAM's at 0x40000000 and a bunch of regs are up there
Nov 18 22:35:23 <tzanger> PC's down in flash (0x338)
Nov 18 22:35:33 <tzanger> trying to flash doesn't work, I get comm failures
Nov 18 22:35:47 <tzanger> now I have read that this device is particularly bad for mangling flash and resetting losing jtag
Nov 18 22:35:51 <tzanger> but I can't seem to get that far
Nov 18 22:36:18 <tzanger> > flash erase_sector 0 0 7
Nov 18 22:36:18 <tzanger> timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: 1
Nov 18 22:36:25 <tzanger> and then it also says it can't access the RAM at 0x40000000
Nov 18 22:38:28 <tzanger> yeah if I try to read memory myself I get a data abort
Nov 18 22:38:29 <tzanger> > mdw 0x40000000 1
Nov 18 22:38:29 <tzanger> memory read caused data abort (address: 0x40000000, size: 0x4, count: 0x1)
Nov 18 22:39:18 <roxfan> weird
Nov 18 22:39:44 <tzanger> I agree.
Nov 18 22:40:06 <tzanger> in JTAG, does the core's clock matter?
Nov 18 22:40:14 <tzanger> i.e. I am running off a 13MHz crystal
Nov 18 22:40:27 <tzanger> if that wasn't working (it should be, I'm just guessing here) would I get oddball errors?
Nov 18 22:41:50 <roxfan> hmm it might... i remember seeing something about luminary(?) chips losing connection after being switched to fast clock...
Nov 18 22:42:06 <roxfan> but 13mhz shouldn't be a problem methinks
Nov 18 23:00:01 <tzanger> hmm
**** ENDING LOGGING AT Thu Nov 19 02:59:56 2009