**** BEGIN LOGGING AT Mon Mar 22 03:00:02 2010 **** ENDING LOGGING AT Mon Mar 22 22:48:09 2010 **** BEGIN LOGGING AT Mon Mar 22 22:54:14 2010 **** ENDING LOGGING AT Mon Mar 22 23:25:21 2010 **** BEGIN LOGGING AT Mon Mar 22 23:44:15 2010 Mar 23 01:06:07 Hello,I have a question about JTAG. Mar 23 01:07:21 There are 5 pins related to JTAG.TDI,TDO,TMS,TCK,nTRST. Mar 23 01:08:28 If I only lead 2 pin out of SOC,it's TDI and TCK,can I use JTAG to write a bootloader into a NandFlash? Mar 23 01:15:29 no - at the *very* least you'd need TMS, to change the state of the JTAG bus (enable it, basically), and you probably need the nTRST (reset) line as well Mar 23 01:16:32 ...and to know if you were successfully communicating before blindly getting the code to work, you would have to have TDO connected as well :-) Mar 23 01:21:45 Thank you,Err.I have a question,in a embeded product,is it possible that no JTAG pins have been lead out of the SOC? Mar 23 01:23:47 it's certainly possible (if you're asking about a layout not including JTAG - most ICs have JTAG, for boundary scan if nothing else) Mar 23 01:33:27 some ic's might have jtag combined into a few pins but you would need some kinda decoder circuit Mar 23 01:33:29 if that's the case Mar 23 01:33:41 so basically 5 is the min Mar 23 01:35:10 The pins in a SOC like a matrix,right?Some pins in the matrix are connected.right?such as TCK,I have tested it and found it connected to many pins in the SOC. Mar 23 01:35:13 many modern processors have a simpler method of loading code/flash for bootstrapping (async or sync serial, for instance), accompanied with a PC-side program that will shove in some code... but those ports aren't usually usable for debugging as well Mar 23 01:44:19 TCK is connected to many pins lead by character 'V'.TCK is similar to voltage right? Mar 23 01:51:53 no, but it may well have an internal pullup Mar 23 01:52:11 you probably shouldn't be probing an unpowered processor for continuity :-) **** ENDING LOGGING AT Tue Mar 23 02:59:57 2010