**** BEGIN LOGGING AT Sat Jan 01 02:59:58 2011 Jan 01 05:06:46 hello everyone Jan 01 05:07:06 i m stuck with audio recording on openmokoo Jan 01 05:07:16 tried dictator and voicenote Jan 01 05:07:20 but not success :( Jan 01 12:49:26 hey Jan 01 19:32:16 SpeedEvil: hi, i've read specs a bit more about pll lock time. it turned out that lock time is 300..1000 us, regulated by user. it's unclean for me why it should be set to something more than 300us which is specified as 'lock time' sheet. this timeout automatically added than 'changing FCLK HCLK PCLK', so for me now moments of switch is unlean from datasheet Jan 01 19:33:11 300us look good for serial as it is less 5% at 115200. Jan 01 20:29:18 gena2x: Umm - 10^6/115200 = 9ish Jan 01 20:31:33 The way the PLL works is that you have a voltage controlled oscillator, an input clock source, a divider, and a correlator. The VCO is fed from the output of the correlator. This compares the output frequency divided by the divider with the input frequency. If it's less, it turns the VCO up, if it's more, it turns the VCO down. If it's exact, it keeps it constant. Jan 01 20:31:38 And sets a 'lock' bit Jan 01 20:31:46 typically Jan 01 20:31:59 changing the divider is instant. Jan 01 20:32:49 But this leaves the VCO set at the wrong frequency, and it takes a significant time to slew, during which time the output frequency is undefined until it locks. Jan 01 20:33:30 So 300 us @ 115200 = 34 bit-times, or 4 chars. Jan 01 20:33:52 During wich time the output frequency is slewing from the old to the new Jan 01 21:08:31 SpeedEvil: ah, yes, sure. 115200 is 8.6us (i am too rare writing 'micro' and 'milli' in English, so often doing totally stupid mistakes) Jan 01 21:09:42 SpeedEvil: so what is purpose of programmable 'locktime' register if it is automatic? Jan 01 21:10:51 SpeedEvil: limit corellator time? Jan 01 21:11:51 The idea is so that you have a stable clockspeed when you come back. Jan 01 21:12:12 yes, i got it Jan 01 21:12:18 Depending on stuff - vcc, temperature, slew, the PLL takes a longer or shorter period to lock Jan 01 21:14:02 but if it automatic (according to your descriptions, it locks then correllator finds that clock is 'exact'), and then sets 'lock' bit (connecting arm core to clock), so what is purpose of user-programmable locktime register? Jan 01 21:14:50 (according to manual it is 300us-1000us) Jan 01 21:15:13 it has PLL block diagram also Jan 01 21:16:06 I'm unsure if it indicates lock, and does anything specific in that case, it's possible it may require the user to set the locktime according to some requirements. Jan 01 21:16:16 I haven't read the doc recently Jan 01 21:16:29 ok, thanks for descriptions anyway Jan 01 21:34:29 SpeedEvil: so, really, nothing can be done, and actual problem is that UEXTCLK is not connected... Jan 01 21:35:40 It depends. You can do the 'pause all uarts' solution. Jan 01 21:36:04 it will skip GPS data... Jan 01 21:36:41 possibly - does it not do flow control? Jan 01 21:37:28 no cts/rts on gps :( Jan 01 21:38:05 cts/rts for UART1 (gps) shares pins with UART2(console) Jan 01 21:39:29 so only way is to loose data Jan 01 21:40:32 or may be pause transmitter? hm... **** ENDING LOGGING AT Sun Jan 02 02:59:58 2011